Abstract: An enhanced nonlinear signal processor for RFI suppression using either biased null zone amplifier or a biased inverting limiter. Two or more nonlinear interference processors are connected in cascade. As a result, a deliberate tracking error, selected to provide only a small amount of relative interference rejection, is introduced into each processor. The effect of each stage is cumulative until some limit to performance improvement, determined by the input/output characteristic of each stage, is reached. The benefits of this discovery are increased dynamic range capability (higher levels of interference-to-wanted signal ratio can be fully rejected), simplification of gain control, and increased flexibility in hardware implementation options resulting from reduced sensitivity to RFI tracking error.