Abstract: Coplanar interdigitated gate and emitter contacts are accessible at the surface of a large area wafer forming a high power, high speed controlled rectifier. A pressure contact is made to the emitter contact which is raised above the level of the gate contact. The upper surface of the gate contact is anodized to provide an insulation layer which prevents accidental shorting of the gate to the emitter contact.

Abstract: Coplanar interdigitated gate and emitter contacts are accessible at the surface of a large area wafer forming a high power, high speed controlled rectifier. A pressure contact is made to the emitter contact which is raised above the level of the gate contact. The raised emitter contact is formed by a process using a novel stencil-masking technique. The process for making the raised emitter contact includes the deposition of a first aluminum layer over the full upper surface of the wafer. The aluminum is etched away from the junction between the emitter and gate layers on the upper surface of the wafer. A photoresist is then deposited over the exposed silicon between the emitter and gate metal layers and over the metallizing on the gate area. A second aluminum layer is then deposited over the full upper surface of the device including the photoresist and the exposed first layer over the emitter area and the two aluminum layers are sintered together.