Patents by Inventor James H. Knapp
James H. Knapp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6833290Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.Type: GrantFiled: February 27, 2003Date of Patent: December 21, 2004Assignee: Semiconductor Components Industries, L.L.C.Inventors: James H. Knapp, Stephen C. St. Germain
-
Patent number: 6677672Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.Type: GrantFiled: April 26, 2002Date of Patent: January 13, 2004Assignee: Semiconductor Components Industries LLCInventors: James H. Knapp, Stephen C. St. Germain
-
Publication number: 20030209804Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.Type: ApplicationFiled: April 26, 2002Publication date: November 13, 2003Applicant: Semiconductor Components Industries, LLCInventors: James H. Knapp, Stephen C. St. Germain
-
Publication number: 20030201520Abstract: A semiconductor device (20) has a first leadframe (200) with a first semiconductor die (70) electrically coupled to one of its leads. A second semiconductor die (130) is mounted to a second leadframe (300) that has a first lead (35, 150) electrically coupled to the second semiconductor die and a second lead (30, 35) mounted to the lead of the first leadframe.Type: ApplicationFiled: February 27, 2003Publication date: October 30, 2003Inventors: James H. Knapp, Stephen C. St. Germain
-
Patent number: 6300679Abstract: A semiconductor component includes a semiconductor chip (341, 502, 601, 701, 1101, 1410, 1501) having first and second surfaces opposite each other, a semiconductor device (301) in the semiconductor chip (341, 502, 601, 701, 1101, 1410, 1501), and a flexible substrate (120, 401, 510, 610, 710, 1000, 1050, 1300, 1401, 1510, 1520) packaging the semiconductor chip (341, 502, 601, 701, 1101, 1410, 1501).Type: GrantFiled: June 1, 1998Date of Patent: October 9, 2001Assignee: Semiconductor Components Industries, LLCInventors: Prosanto K. Mukerji, Ronald E. Thomas, George W. Hawkins, Rajesh Srinivasan, Colin B. Bosch, James H. Knapp, Laura J. Norton, Michael J. Seddon
-
Patent number: 6116791Abstract: An optical coupler (60) includes of an optical connector (10) coupled to an optoelectric board (64). An optical fiber (50) is inserted into the optical connector (10). The optical fiber (50) is bent to an angle of approximately 90.degree. inside the optical connector (10). A tip (55) of the optical fiber (50) is substantially perpendicular to the optoelectric board (64) and aligned to an optical region of an optoelectric device (62) on the optoelectric board (64). A portion of the optical fiber (50) outside the optical connector (10) is substantially parallel to the optoelectric board (64). A fiber retainer (30) secures the optical fiber (50) to the optical connector (10).Type: GrantFiled: June 1, 1998Date of Patent: September 12, 2000Assignee: Motorola, Inc.Inventors: Albert John Laninga, James H. Knapp, Laura J. Norton, Joseph E. Sauvageau
-
Patent number: 6081031Abstract: An electronic component includes a substrate (301, 801), a leadframe (101, 601, 710) coupled to a first surface of the substrate (301, 801) and extending beyond the first surface and towards a second surface of the substrate (301, 801), and an electrically conductive layer coupled to the second surface and coplanar with a contact portion of the leadframe (101, 601, 710) where the leadframe (101, 601, 710) and the electrically conductive layer form a package around the substrate (301, 801).Type: GrantFiled: June 29, 1998Date of Patent: June 27, 2000Assignee: Semiconductor Components Industries, LLCInventors: James P. Letterman, Jr., Albert J. Laninga, James H. Knapp, Joseph K. Fauty, William F. Burghout
-
Patent number: 5973337Abstract: A semiconductor device (10) coupled to ball grid array substrate (11) and encapsulated by an optically transmissive material (29, 31). The ball grid array substrate (11) has conductive interconnects (14) and a semiconductor receiving area (17) on a top surface and solder pads (13) on a bottom surface. An optoelectronic component (24) is mounted on the semiconductor receiving area (17) and encapsulated with the optically transmissive material (29, 31). Solder balls (18) are formed on the solder pads (13).Type: GrantFiled: August 25, 1997Date of Patent: October 26, 1999Assignee: Motorola, Inc.Inventors: James H. Knapp, Dwight L. Daniels, Keith E. Nelson, Brian A. Webb
-
Patent number: 5933558Abstract: An optoelectronic connector (10) coupled to a fiber ferrule (38) containing an optical fiber (39) and a method for coupling the optoelectronic connector (10) to the fiber ferrule (38). The optoelectronic connector (10) has a base (11) and walls (13, 14, 17, and 18) that form a cavity (19). A semiconductor receiving area (26) extends into a first portion of the base (11) and an interconnect recess (27) extends into a second portion of the base (11). Alignment pins (31) extend from the second portion of the base (11). The optoelectronic connector (10) may be a unitary structure. The fiber ferrule (38) is inserted into the cavity (19) to form an optoelectronic device (30).Type: GrantFiled: May 22, 1997Date of Patent: August 3, 1999Assignee: Motorola, Inc.Inventors: Joseph E. Sauvageau, James H. Knapp, Francis J. Carney, Laura J. Norton
-
Patent number: 5928595Abstract: A method of manufacturing a semiconductor component includes forming a vertical side seal for a runner in a first mold plate by mating a protrusion of the first mold plate with a protrusion of a second mold plate. As an encapsulating material is forced through the runner, the vertical side seal prevents an encapsulating material from leaking out of the edge of the runner.Type: GrantFiled: September 22, 1997Date of Patent: July 27, 1999Assignee: Motorola, Inc.Inventors: James H. Knapp, Cliff J. Scribner, Albert J. Laninga, Sr.
-
Patent number: 5900669Abstract: A substrate having a vent (20) and a method of forming the vent (20). A substrate (11) has conductive traces (14) and a semiconductor chip attach pad (17) on a top surface and conductive traces (12) and a bonding pad (13) on the bottom surface. A masking layer (18) is formed over the substrate (11) and openings are formed in the masking layer (18) to expose the conductive traces (14) and a semiconductor chip attach pad (17). The vent (20) is formed in the masking layer (18). A semiconductor chip (31) is mounted to the semiconductor chip attach pad (17). During a step of encapsulating the semiconductor chip (31) with a mold compound, the vent (20) provides pressure relief.Type: GrantFiled: June 30, 1997Date of Patent: May 4, 1999Assignee: Motorola, Inc.Inventors: James H. Knapp, Keith E. Nelson, Les Ticey, Kevin J. Foley
-
Patent number: 5883996Abstract: An electronic component (10) for aligning a light transmitting structure (19) such as an optical fiber or a waveguide, includes a semiconductor substrate (11) which contains or supports at least one semiconductor device (12). To provide electrical isolation and mechanical protection for the semiconductor device (12), a passivation layer (25) is disposed over the semiconductor substrate (11). At least one alignment feature (14) for the light transmitting structure (19) is provided over the passivation layer (25) and over the semiconductor device (12). The alignment feature (14) is manufactured simultaneously during a flip chip bump process which eliminates the necessity for extra processing steps while providing additional alignment functionality.Type: GrantFiled: July 2, 1997Date of Patent: March 16, 1999Assignee: Motorola, Inc.Inventors: James H. Knapp, Francis J. Carney, Laura J. Norton
-
Patent number: 5834062Abstract: A material (21) is transferred to an electronic component (32) using a transfer apparatus (10). The transfer apparatus (10) has pins (13) that pass through openings (19) in a cavity plate (16). The pins (13) and the openings (19) in the cavity plate (16) form cavities (20) that are filled with the material (21). The pins (13) are then extended from the cavity plate (16) to transfer the material (21) from the cavities (20) to the electronic component (32).Type: GrantFiled: September 3, 1997Date of Patent: November 10, 1998Assignee: Motorola, Inc.Inventors: Timothy L. Johnson, James H. Knapp, Albert J. Laninga
-
Patent number: 5768456Abstract: An optoelectronic package including an interconnect substrate having electronic components and carrying an optical fiber holder. The holder containing an end of an optical fiber and including an end surface in which is formed alignment openings. A flexible substrate having conductive traces, a first end, a second end, and alignment openings formed proximate the first end, interconnects the holder and the electronic components of the interconnect substrate. A photonic unit is mechanically and electrically coupled to the flexible substrate proximate the first end in precise relation to the alignment openings so as to be aligned with the optical fiber by inserting alignment pins extending concurrently through the alignment openings of the flexible substrate and the alignment openings of the optical fiber holder.Type: GrantFiled: November 22, 1996Date of Patent: June 16, 1998Assignee: Motorola, Inc.Inventors: James H. Knapp, Barbara M. Foley
-
Patent number: 5761364Abstract: An optical system (22) contains an optical waveguide (10) having cladding layers (11, 12) defining a channel (19) that is filled with an optically conductive core material (20). The index of refraction of the optically conductive core material (20) is greater than the index of refraction of the cladding layers (11, 12) to maintain total internal reflection of an input light beam (39). The channel (19) is tapered at an angle (32) to increase beam divergence of the input light beam (39). The beam divergence is increased while the input light beam (39) is reflected through the optically conductive core material (20) from an opening (26) to an exit (27) of the channel (19). The taper of the channel (19) maintains an adiabatic characteristic for the waveguide (10).Type: GrantFiled: November 2, 1995Date of Patent: June 2, 1998Assignee: Motorola, Inc.Inventors: James H. Knapp, Laura J. Norton, Joseph E. Sauvageau
-
Patent number: 5659648Abstract: A light transmitting structure or optical waveguide (47) of the present invention can provide both optical and electrical conductivity. The optical waveguide (47) is capable of simultaneously transmitting multiple optical and electrical signals. The optical waveguide (47) has several cladding layers (40, 41, 42, 43, 44) which optically isolate several different regions of waveguide core material (45, 46) through which the multiple optical signals are transmitted. To provide a compact structure, portions of the cladding layers (42, 43, 44) of the optical waveguide (47) are used as electrical conductors while the waveguide core material (45, 46) is used as an electrical insulator for the electrical conductors.Type: GrantFiled: September 29, 1995Date of Patent: August 19, 1997Assignee: Motorola, Inc.Inventors: James H. Knapp, Francis J. Carney
-
Patent number: 5637264Abstract: A method of fabricating an optical waveguide (10) includes using an electrical discharge machine (20) to fabricate mold plates (41, 61) for molding cladding layers (11, 12) of the optical waveguide (10). The cladding layers (11, 12) contain rounded edges (15, 16) which are aligned to form a cylindrical channel or core (13). The cylindrical shape of the channel (13) improves the reliability of the waveguide (10) compared to waveguides having a conventional square or rectangular channel with sharp corners. An optically transparent material (17) fills the cylindrical channel (13) and serves as the medium through which light is transmitted. The refractive index of the optically transparent material (17) is greater than that of the cladding layers (11, 12) to keep the light within the cylindrical channel. The optically transparent material (17) also serves as an adhesive for the cladding layers (11, 12).Type: GrantFiled: September 29, 1995Date of Patent: June 10, 1997Assignee: Motorola, Inc.Inventors: James H. Knapp, Laura J. Norton, Michael L. Majercak, Michael C. Majercak
-
Patent number: 5529682Abstract: A method for use with semiconductor devices (47) that have leads (49) electroplated with a solderable metal (53) includes exposing the solderable metal (53) to an elevated temperature sufficient to flow or melt the solderable metal (53). In a preferred embodiment, the solderable metal (53) is exposed to the elevated temperature before the leads (49) are severed from the leadframe (48).Type: GrantFiled: June 26, 1995Date of Patent: June 25, 1996Assignee: Motorola, Inc.Inventors: James H. Knapp, Francis J. Carney, Jr.
-
Patent number: 5468910Abstract: A method for making an improved semiconductor device package is provided. A semiconductor die (16) is attached to a supportive substrate (10, 12). A protective lid (20) is attached to the supportive substrate (10, 12), over the semiconductor die (16). The protective lid (20) is partially encapsulated with molding compound (28). The protective lid (20) prevents the molding compound (30) from contacting the semiconductor die (16), and associated wirebonded wires (18). A portion (30) of the protective lid (20) remains exposed. Thus, a molded package compatible with current product designs and assembly processes is provided, yet disadvantages caused by molding compound contacting the die (16) and wires (18) are avoided. Furthermore, the exposed protective lid (30) provides superior heat dissipation for the package.Type: GrantFiled: January 19, 1995Date of Patent: November 21, 1995Assignee: Motorola, Inc.Inventors: James H. Knapp, Keith E. Nelson
-
Patent number: 5319242Abstract: A semiconductor package includes a die having a first surface including a plurality of bond pads disposed thereon and a second surface. Inner lead portions of a TAB leadframe are coupled to the bond pads and outer lead portions electrically coupled to the inner lead portions extend therefrom. An encapsulation is disposed on the first surface of the die including the bond pads having the inner lead portions of the TAB leadframe bonded thereto. Encapsulation is also disposed about the sides of the die. The second surface of the die remains exposed. This allows for a relatively thin package having superior thermal dissipation properties.Type: GrantFiled: March 18, 1992Date of Patent: June 7, 1994Assignee: Motorola, Inc.Inventors: Francis J. Carney, Edward M. Majors, James H. Knapp