Abstract: An article of footwear or other product may include a material element having a first layer, a second layer, a third layer, and at least one strand. The second layer is positioned between the first layer and the third layer, and the second layer is formed from a thermoplastic polymer material. The strand is located between the first layer and the second layer, and the strand lies substantially parallel to the second layer for a distance of at least five centimeters. In this configuration, the thermoplastic polymer material may join the first layer and the third layer to the second layer. The thermoplastic polymer material may also join the strand to the second layer.

Abstract: An article of footwear may have a sole structure and an upper that includes a foundation element, a tensile strand, and a securing strand. The tensile strand is located adjacent to an exterior surface of the foundation element and substantially parallel to the exterior surface for a distance of at least five centimeters. The securing strand joins or secures the tensile strand to the foundation element. Although the thicknesses may vary, a thickness of the tensile strand may be at least three times the thickness of the securing strand. In some configurations, a backing strand may also assist with joining the securing strand to the foundation element.

Abstract: An article of footwear may have a sole structure and an upper that includes a foundation element, a tensile strand, and a securing strand. The tensile strand is located adjacent to an exterior surface of the foundation element and substantially parallel to the exterior surface for a distance of at least five centimeters. The securing strand joins or secures the tensile strand to the foundation element. Although the thicknesses may vary, a thickness of the tensile strand may be at least three times the thickness of the securing strand. In some configurations, a backing strand may also assist with joining the securing strand to the foundation element.

Abstract: A hybrid touch device includes a direct touch unit and an indirect touch unit disposed at two sides respectively. The direct touch unit includes a base layer, a sensing line layer, a driving line layer, a bonding layer, and a covering layer. The indirect touch unit includes a first conducting layer, a second conducting layer, and a plurality of spacers between the first conducting layer and the second conducting layer. An optically clear adhesive (OCA) layer is disposed between the direct touch unit and the indirect touch unit. The base layer of the direct touch unit is a conductive film. A shielding layer is disposed between the conductive film and the OCA layer. The second conducting layer of the indirect touch unit is a thin conductive glass.

Abstract: A reliable long life RF-MEMS capacitive switch is provided with a dielectric layer comprising a “fast discharge diamond dielectric layer” and enabling rapid switch recovery, dielectric layer charging and discharging that is efficient and effective to enable RF-MEMS switch operation to greater than or equal to 100 billion cycles.

Abstract: An interface to a dynamically configurable arithmetic unit can include data alignment modules, where each data alignment module receives input variables being associated with one or more arithmetic expressions. The interface can include multiplexers coupled to the data alignment modules, wherein a data alignment module has outputs coupled to a first multiplexer. The first multiplexer can have a selection line and an output coupled to an input port of the dynamically configurable arithmetic unit. The interface can include a second multiplexer having input instructions and the selection line, where each instruction is associated with one of the arithmetic expressions and has an operation to be performed by the dynamically configurable arithmetic unit. The second multiplexer is configurable to provide selected ones of the input instructions to the dynamically configurable arithmetic unit through an output of the second multiplexer responsive to the selection line.

Abstract: A method of modeling a design in a high level modeling system that supports unidirectional data flow, may comprise identifying a bus-block to represent a connectivity of a bi-directional bus in an system. The bus-block may be represented in serial relationship with the bus. Taps may interface the bus via the bus-block. During simulation, the bus-block emulates behavior of a tri-state buffer in series with an input line for the tap interface. During synthesis, pairs of unidirectional input and output lines of opposite data-routing orientation, which may emulate bus ports to the bus-block, may be collapsed to a single bus port. The synthesis may further generate a netlist that may dispose a tri-state buffer between a tap input and the bus. The netlist may also represent layout of the tri-state buffer for driving an output of the tap.

Abstract: An article of footwear may have a sole structure and an upper that includes a foundation element, a tensile strand, and a securing strand. The tensile strand is located adjacent to an exterior surface of the foundation element and substantially parallel to the exterior surface for a distance of at least five centimeters. The securing strand joins or secures the tensile strand to the foundation element. Although the thicknesses may vary, a thickness of the tensile strand may be at least three times the thickness of the securing strand. In some configurations, a backing strand may also assist with joining the securing strand to the foundation element.

Abstract: Method and apparatus for translating a first program in a dynamically-typed language to a program in a hardware description language. From the dynamically-typed-language first program, a second program in single static assignment format is generated. For cases where a variable is assigned different data types at different places in the program, the assignments of the different data types are resolved for the variable. The second program is then translated to a program in the hardware description language.

Abstract: Articles of footwear and a variety of other products may incorporate tensile strand elements. In manufacturing an element, such as the tensile strand elements, a strand, a first layer, and a second layer may be located between a first surface and a second surface of a press. The first surface includes a first material and the second surface includes a second material, with the first material having greater hardness than the second material. The strand, the first layer, and the second layer are then compressed between the first surface and the second surface.

Abstract: An article of footwear or other product may include a material element having a first layer, a second layer, a third layer, and at least one strand. The second layer is positioned between the first layer and the third layer, and the second layer is formed from a thermoplastic polymer material. The strand is located between the first layer and the second layer, and the strand lies substantially parallel to the second layer for a distance of at least five centimeters. In this configuration, the thermoplastic polymer material may join the first layer and the third layer to the second layer. The thermoplastic polymer material may also join the strand to the second layer.

Abstract: A method of resetting a programmable logic device (PLD) for use with hardware co-simulation can include loading a full bitstream into the PLD. The full bitstream can program the PLD with a circuit design to be used with a first simulation. The method further can include loading a partial bitstream into the PLD thereby resetting at least one component of the circuit design that does not have a reset function such that the circuit design is initialized for use in a subsequent simulation.

Abstract: Generating a high-level, bit-accurate and cycle-accurate simulation model. The various embodiments generate the simulation model from a functional description of a module and an HDL description of the module. The functional description may be un-timed and specified in a high-level language. The HDL description is realizable in hardware. The simulation model is created by obtaining the control specification from the HDL description and combining the control specification with the data path description from functional description.

Abstract: An article of footwear may have a sole structure and an upper that includes a foundation element, a strand, and a cover layer. The strand is positioned adjacent to an exterior surface of the foundation element and substantially parallel to the exterior surface for a distance of at least five centimeters. The cover layer extends along the strand for the distance of at least five centimeters, and the strand is positioned between the cover layer and the foundation element. In some configurations, the cover layer has a pair of edges on opposite sides of the strand, the strand is substantially centered between the edges of the cover layer for the distance of at least five centimeters, and areas of the exterior surface are exposed beyond the edges of the cover layer.

Abstract: An exemplary embodiment includes a method that receives a plurality of mathematical expressions having a plurality of input variables. The mathematical expressions can then be parsed, checked for proper syntax and one or more abstract syntax trees can be formed. Next, the input variables are then assigned to input ports of the dynamically configurable arithmetic unit. Then using the parsed mathematical expressions with the assigned input ports, a list of operations to be performed by the dynamically configurable arithmetic unit are determined. And lastly, an interface to the dynamically configurable arithmetic unit is generated using in part the variable-to-input port assignments and the list of operations.

Abstract: The invention provides an interface that can facilitate integration of user specific proprietary cores and commercially available cores during customization of an FPGA-based SoC. A selected hardware or software system component used for customizing the FPGA-based SoC can be configured using parameters that can be automatically propagated and used to configure peer system components. During configuration of the peer system components, other parameters used to configure those peer system components can also be propagated and used to configure other system components during customization of the FPGA-based SoC.

Abstract: Method and apparatus for clock stabilization detection for hardware simulation is described. More particularly, a lock signal is obtained, for example from a digital clock module. A least common multiple (LCM) clock signal is generated, for example from a clock module. A control signal is generated at least partially responsive to the LCM clock signal and the lock signal. The control signal may be generated from a state machine and applied to select circuitry, where the control signal is used to mask application of the output clock signal responsive to the control signal.

Abstract: A high power LED lamp and method for retrofitting conventional traffic signal lamps. The LED lamp includes a housing, a power supply disposed in the housing, a plurality of LEDs mounted to a substantially planar mounting surface in the housing and electrically connected to the power supply for producing diverging light, and a threaded electrical connector extending from the housing. The method includes replacing a convention incandescent light bulb with the LED lamp, and installing a Fresnel lens inside the traffic signal lamp that collimates and just fills and illuminates the outer lens of the traffic signal lamp.

Abstract: Co-simulation of an electronic circuit design using an embedded processor on a programmable logic device (PLD). The programmable logic resources of a PLD are used to perform hardware-based co-simulation of a first portion of the electronic circuit design. Software-based co-simulation of a second portion of the electronic circuit design is performed using the embedded processor.

Abstract: Various approaches for embedding a hardware object in an event-driven simulator are disclosed. The various approaches involve generating an HDL proxy component having an HDL definition of each port of the hardware object and respective event handler functions associated with input ports of the HDL proxy component. The event handler functions are responsive to simulation events appearing on the input ports. A configuration bitstream is generated for implementing the hardware object on a programmable logic circuit, and a first object is generated to contain configuration parameter values indicating characteristics of the ports and a location of the configuration bitstream. A second object is generated and is configured to initiate configuration of the programmable logic circuit with the configuration bitstream. The second object further provides input data to and receives output data from the programmable logic circuit.