Patents by Inventor James Imbornone

James Imbornone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624658
    Abstract: A frequency mixer having parallel mixer cores is described that is configured to heterodyne a signal. In an implementation, the frequency mixer includes a first mixer core and a second mixer core. A first balun is connected to the first mixer core and configured to furnish a LO signal occurring in a first range of frequencies to the first mixer core. The mixer includes a second balun coupled to the second mixer core, and the second balun is configured to furnish a LO signal occurring in a second range of frequencies during a second time interval. The mixer includes a first biasing voltage source that is center tapped to the first balun and a second biasing voltage source is center tapped to the second balun to further prevent operation of the at least substantially non-operational mixer core.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: January 7, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Theron L. Jones, Richard D. Davis, James Imbornone, Xuejin Wang
  • Patent number: 6396362
    Abstract: A compact BALUN transformer comprises a primary and a secondary conductor loop. Each of these loops are disposed in a substantially flat spiral configuration. However, one of these loops, either the primary or the secondary, is preferably disposed in a multi-layer (stacked) configuration. The stacking of at least one of the primary or secondary layers in a multi-layer arrangement provides an increase of impedance in one of the loops. This increased impedance for impedance matching purposes comes with the advantage that parasitic capacitance between primary and secondary layers as would normally be introduced in a multi-layer configuration is absent. In another embodiment of the present invention, both conductor loops are disposed in a multi-layer configuration. Such configurations are particularly useful for 1 to 1 impedance matching conditions and for somewhat lower frequency BALUN circuits.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: May 28, 2002
    Assignee: International Business Machines Corporation
    Inventors: Jean-Marc Mourant, James Imbornone
  • Publication number: 20010050598
    Abstract: The source to drain capacitance of a FET device is used by connecting the source and drain together electrically so as to form a two terminal capacitive device which may be switched into and out of a parallel resonant circuit. Thus, sets of FET devices with their sources and drains connected together are employed in a circuit which produces and output voltage signal at a frequency which is tunable within a plurality of different individual bands. The resultant voltage controlled oscillator is particularly useful in cellular telephone and related wireless systems and/or in any other situation where integrated high frequency voltage control oscillator circuits are desired.
    Type: Application
    Filed: January 14, 2000
    Publication date: December 13, 2001
    Inventors: Jean-Marc Mourant, James Imbornone
  • Patent number: 6222399
    Abstract: A circuit and a method for starting a bandgap circuit which is in a “non-start” mode. The circuit incorporates an inverter circuit with hysterysis and sharp transitions caused by a positive feedback loop. The inverter circuit, which is connected at its input to a bandgap voltage node of the bandgap circuit, activates a switching transistor when voltage (Vbg) at the bandgap voltage node is low and deactivates the switching transistor when Vbg is high. The switching transistor draws current from a critical node of the bandgap circuit, such as the drain of a current mirror PMOS transistor, when it is activated, starting the bandgap circuit.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: April 24, 2001
    Assignee: International Business Machines Corporation
    Inventors: James Imbornone, Jean-Marc Mourant
  • Patent number: 6137376
    Abstract: A planar BALUN circuit comprises two separate parallel branches with three capacitive elements. The values of the capacitive elements are selected to provide impedances which first of all enhance balanced current flow and which also impede and reduce unbalanced current flow. The circuit is provided so as to lie substantially in a single plane as a pattern disposed on a printed circuit board together with either certain discrete capacitive elements or with capacitive structures which are also printed on the board. The BALUN circuits of the present invention are particularly useful for circuits operating in the gigahertz range and are particularly useful in light weight devices such as cellular telephones and cellular telephone systems.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: October 24, 2000
    Assignee: International Business Machines Corporation
    Inventors: James Imbornone, Jean-Marc Mourant