Patents by Inventor James J. McNamara

James J. McNamara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142930
    Abstract: A building system including one or more storage devices storing instructions thereon that, when executed by one or more processors, cause the one or more processors to ingest information comprising at least one of occupancy information or energy usage information associated with a building. The instructions further cause the one or more processors to generate a space usage recommendation based on the information. The instructions further cause the one or more processors to cause a graphical model of the building to include a representation of the information and the space usage recommendation. The instructions further cause the one or more processors to cause a display device of a user device to display the graphical model within a user interface.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 2, 2024
    Inventors: Jason Pelski, James Callanan, Edward Gerard McNamara, Michael J. Wenzel, Robbie Glen Davis, Shawn D. Schubert, Evan O'Gorman, Himanshu Gupta, Kristian Koivisto-Kokko, Ashteya Biharisingh
  • Publication number: 20240127943
    Abstract: A pathogen detection and display system is configured to discover and display the location of substances of interest, particularly pathogens that can spread infection. The detection and display system can be used in healthcare facilities on surfaces, medical equipment and devices, patients, and staff, for example.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 18, 2024
    Applicant: Cardeya Corporation
    Inventors: Charles R. Sperry, Lawrence J. Pillote, Vincent A. Piucci, Dennis F. McNamara, JR., James M. Wilson, III, Lisa Ruth Stowe, Brett M. Sitzlar, Barbara A. Piucci, David C. Chase
  • Patent number: 8558374
    Abstract: An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: October 15, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Voya R. Markovich, Rabindra N. Das, Frank D. Egitto, James J. McNamara, Jr.
  • Patent number: 8446707
    Abstract: A low loss capacitance and low loss insulating dielectric material consisting of a thermosetting resin, thermoplastic resin, a cross-linker, and containing a quantity of ferroelectric ceramic nano-particles of barium titanate within. The combined low loss insulating dielectric layer and a low loss capacitive layer resulting from the material allows one continuous layer that can form internal capacitors and permit the modifying the dielectric thickness between signal layers for impedance matching within a layer of substrate. More significantly, the applied layer of low loss capacitive materials can simultaneously act as a capacitor as well as a dielectric for separation of signal layers.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: May 21, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Konstantinos I. Papathomas, Voya R. Markovich, James J. McNamara
  • Patent number: 8299371
    Abstract: A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: October 30, 2012
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr.
  • Patent number: 8288857
    Abstract: A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: October 16, 2012
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Voya R. Markovich, James J. McNamara, Jr., Mark D. Poliks
  • Publication number: 20120201006
    Abstract: An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.
    Type: Application
    Filed: February 8, 2011
    Publication date: August 9, 2012
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Voya R. Markovich, Rabindra N. Das, Frank D. Egitto, James J. McNamara, JR.
  • Publication number: 20120152605
    Abstract: A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 21, 2012
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Rabindra N. Das, John M. Lauffer, Voya R. Markovich, James J. McNamara, JR.
  • Publication number: 20120068326
    Abstract: A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Rabindra N. Das, Voya R. Markovich, James J. McNamara, JR., Mark D. Poliks
  • Publication number: 20110173809
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Application
    Filed: January 20, 2010
    Publication date: July 21, 2011
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, JR., Peter A. Moschak
  • Patent number: 7977034
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: July 12, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr., Peter A. Moschak
  • Patent number: 7827682
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: November 9, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr., Peter A. Moschak
  • Patent number: 7801833
    Abstract: A system and method for identifying and controlling the movement of various items, e.g., suitcases, associated with respective ones of various individuals, e.g., those desiring to travel on a selected means of transportation such as an airline, railway or the like. The system includes a plurality of programmable fingerprint readers each associated with a respective one of the items, a fingerprint scanner for scanning fingerprints from each individual and associating it with one or more of the items, a CPU for receiving readings from each of the item fingerprint readers and information from the scanner, and a retrieving unit (e.g., such as one owned by the transporting party) which retrieves selected ones of the fingerprint readings stored by the CPU for comparing with also retrieved readings from the respective fingerprint readers when the traveling individual presents an item to the transporting party for travel.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: September 21, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar Bhatt, Michael Hills, James J. McNamara, Jr., Candido Tiberia
  • Patent number: 7627947
    Abstract: A method of making a multilayered circuitized substrate in which a continuous process is used to form electrically conductive layers which each will form part of a sub-composite. The sub-composites are then aligned such that openings within the conductive layers are also aligned, the sub-composites are then bonded together, and a plurality of holes are then laser drilled through the entire thickness of the bonded structure. The dielectric layers used in the sub-composites do not include continuous or semi-continuous fibers therein, thus expediting hole formation there-through.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: December 8, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Thomas J. Davis, Subahu D. Desai, John M. Lauffer, James J. McNamara, Jr., Voya R. Markovich
  • Patent number: 7530167
    Abstract: A method of making a printed circuit board in which the board includes a common power plane having dielectric layers on opposing sides thereof and a signal layer on each of said dielectric layers, each signal layer comprising a plurality of substantially parallel signal lines running in substantially similar directions across said signal layers. Predetermined portions of the signal lines in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes in the power plane so as to be isolated therefrom.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: May 12, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr., David L. Thomas
  • Patent number: 7510324
    Abstract: A method of inspecting articles using an imaging inspection apparatus which utilizes a plurality of individual imaging devices for directing beams onto the articles having objects therein to detect the objects based on established criteria. The method involves the enhanced cooling of the heat-generating imaging devices in which a fan directs cooling fluid onto a plurality of deflectors which in turn direct said fluid onto selected ones of said imaging devices.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: March 31, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Jr., Sanjeev Sathe
  • Patent number: 7490984
    Abstract: A method of making an imaging inspection apparatus which involves positioning a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The method also involves providing a cooling structure in such a manner that it will direct cooling fluid onto the imaging devices to cool these during apparatus operation.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: February 17, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Jr., Sanjeev Sathe
  • Publication number: 20080170670
    Abstract: A method of inspecting articles using an imaging inspection apparatus which utilizes a plurality of individual imaging devices for directing beams onto the articles having objects therein to detect the objects based on established criteria. The method involves the enhanced cooling of the heat-generating imaging devices in which a fan directs cooling fluid onto a plurality of deflectors which in turn direct said fluid onto selected ones of said imaging devices.
    Type: Application
    Filed: August 2, 2007
    Publication date: July 17, 2008
    Applicant: Endicott Interconnect Technologies , Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Sanjeev Sathe
  • Publication number: 20080144768
    Abstract: A method of making an imaging inspection apparatus which involves positioning a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The method also involves providing a cooling structure in such a manner that it will direct cooling fluid onto the imaging devices to cool these during apparatus operation.
    Type: Application
    Filed: February 22, 2008
    Publication date: June 19, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara,, Sanjeev Sathe
  • Patent number: 7354197
    Abstract: An imaging inspection apparatus which utilizes a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) positioned on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The apparatus utilizes a cooling structure to provide cooling to the imaging devices.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: April 8, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Ashwinkumar C. Bhatt, Varaprasad V. Calmidi, James J. McNamara, Jr., Sanjeev Sathe