Patents by Inventor James J. Parsonese

James J. Parsonese has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11677628
    Abstract: Topology discovery between compute nodes and interconnect switches including creating, on an interconnect switch, a virtual topology discovery device for a first port, wherein the interconnect switch is coupled to a compute node via the first port, and wherein the virtual topology discovery device comprises a port identifier for the first port; mapping the virtual topology discovery device to the first port; receiving an inventory request from the compute node via the first port; routing the inventory request to the virtual topology discovery device for the first port; and sending, from the virtual topology discovery device for the first port, the port identifier to the compute node.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 13, 2023
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: Fred A. Bower, III, Caihong Zhang, Xiao Dong Du, Patrick L. Caporale, Jeffrey R. Hamilton, James J. Parsonese, Pravin Patel
  • Patent number: 11288102
    Abstract: Modifying resources for composed systems based on resource models including receiving a workload for execution on a composed system; extracting workload characteristics from the workload; matching the workload characteristics to a resource model, wherein the resource model comprises an initial configuration of compute elements for the composed system and a configuration modification to the initial configuration of the compute elements as the workload executes; composing the composed system using the initial configuration of compute elements described by the resource model, wherein the composed system comprises a subset of compute elements from a resource pool of compute elements; and executing, based on the resource model, the workload using the composed system, including modifying the initial configuration of the compute elements according to the resource model.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: March 29, 2022
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: Jeffrey R. Hamilton, James J. Parsonese, Pravin Patel
  • Publication number: 20190182117
    Abstract: Topology discovery between compute nodes and interconnect switches including creating, on an interconnect switch, a virtual topology discovery device for a first port, wherein the interconnect switch is coupled to a compute node via the first port, and wherein the virtual topology discovery device comprises a port identifier for the first port; mapping the virtual topology discovery device to the first port; receiving an inventory request from the compute node via the first port; routing the inventory request to the virtual topology discovery device for the first port; and sending, from the virtual topology discovery device for the first port, the port identifier to the compute node.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 13, 2019
    Inventors: FRED A. BOWER, III, CAIHONG ZHANG, XIAO DONG DU, PATRICK L. CAPORALE, JEFFREY R. HAMILTON, JAMES J. PARSONESE, PRAVIN PATEL
  • Publication number: 20190065256
    Abstract: Modifying resources for composed systems based on resource models including receiving a workload for execution on a composed system; extracting workload characteristics from the workload; matching the workload characteristics to a resource model, wherein the resource model comprises an initial configuration of compute elements for the composed system and a configuration modification to the initial configuration of the compute elements as the workload executes; composing the composed system using the initial configuration of compute elements described by the resource model, wherein the composed system comprises a subset of compute elements from a resource pool of compute elements; and executing, based on the resource model, the workload using the composed system, including modifying the initial configuration of the compute elements according to the resource model.
    Type: Application
    Filed: August 29, 2017
    Publication date: February 28, 2019
    Inventors: JEFFREY R. HAMILTON, JAMES J. PARSONESE, PRAVIN PATEL
  • Patent number: 9544001
    Abstract: A system, method and a computer program product for performing the method are provided. The system includes a communication device installed in a vehicle, wherein the communication device is configured to receive a wireless network broadcast message including target criteria other than a network identifier, and output the broadcast message to a user if the communication device satisfies the target criteria. The method includes determining a current location of a first mobile communication device, and the first device sending a message containing target criteria associated with a target vehicle over a wireless data network, wherein the target criteria does not include a network identifier. The method further includes broadcasting the message containing the target criteria over a geographically-specific area including the current location of the first mobile communication device, wherein only a second mobile communication device satisfying the target criteria will receive and display the message.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: January 10, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Alfredo Aldereguia, Alan Fontaine, John Langgood, Carol Machuca, Joseph E. Maxwell, James J. Parsonese
  • Patent number: 9465761
    Abstract: A hardware system comprises a digital signal generator, which generates a digital electrical signal that describes a first physical state of a first device; an analog electrical signal generator, which generates an analog electrical signal that describes a second physical state of the first device; a hybrid digital state signal generator, which generates a hybrid digital state signal that comprises the analog electrical signal overlaid onto the initial digital electric signal; and a hybrid signal transmitter, which transmits the hybrid digital state signal from the first device to a second device, wherein the second device comprises a hybrid signal receiver/decoder that extracts the analog electrical signal from the hybrid digital state signal.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: October 11, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael Decesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
  • Patent number: 9367442
    Abstract: Systems and methods for allocating memory usage based on voltage regulator efficiency are disclosed. According to an aspect, a method may include receiving a first efficiency value of a first voltage regulator associated with a first memory device among multiple memory devices. The method may also include receiving a second efficiency value of a second voltage regulator associated with a second memory device of the memory devices. The method may also include receiving a request to write data to one of the first memory devices and the second memory device. The method may also include determining whether to write the data to the first memory device or the second memory device based on the first and second efficiency values. Further, the method may include writing the data to the first memory device or the second memory device based on the determination.
    Type: Grant
    Filed: July 12, 2014
    Date of Patent: June 14, 2016
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Brian C. Totten
  • Patent number: 9323321
    Abstract: A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: April 26, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael Decesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden
  • Patent number: 9301421
    Abstract: A closed loop liquid cooling system for electronic packages, the closed loop liquid cooling system including: a fan impeller configured so that air flows from the fan impeller through a radiator of the closed loop liquid cooling system; an electric motor coupled to the fan impeller, the electric motor configured to rotate the fan impeller; and a pump impeller configured for delivering liquid to the electronic package via a cold plate, the pump impeller mechanically coupled to the fan impeller such that rotating the fan impeller causes the pump impeller to rotate such that liquid is circulated in the closed loop liquid cooling system.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: March 29, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael D. French, Jr., James J. Parsonese, Kevin S. D. Vernon
  • Patent number: 9261098
    Abstract: Methods and systems for fan speed control based on memory margin are disclosed. According to an aspect, a method includes determining an operating margin of a memory interface. The method also includes determining whether the operating margin of the memory interface meets a predetermined condition. Further, the method includes controlling a speed of a computing system cooling fan based on the operating margin in response to determining the operating margin meets the predetermined condition.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: February 16, 2016
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Philip L. Weinstein
  • Patent number: 9239809
    Abstract: A message is simultaneously broadcast to multiple systems on a 1-wire bus. A first addressed communication session is established between a microprocessor and a first 1-wire I/O expander via a 1-wire bus, where the first 1-wire I/O expander is electrically coupled to a first system. The first 1-wire I/O expander is placed into “fast access mode”, and then removed from the 1-wire bus by opening a switch to the 1-wire bus. A second addressed communication session is established between the microprocessor and a second 1-wire I/O expander before the switch recloses, where the second 1-wire I/O expander is electrically coupled to a second system. The second 1-wire I/O expander is then placed into “fast access mode”. In response to the timer expiring and the switch reclosing, an unaddressed message is broadcast from the microprocessor to the first and second systems via the first and second 1-wire I/O expanders.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: January 19, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael Decesaris, James J. Parsonese, Luke D. Remis, Kevin S. D. Vernon
  • Patent number: 9239613
    Abstract: A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: January 19, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael Decesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman, Steven L. Vanderlinden
  • Publication number: 20160011962
    Abstract: Systems and methods for allocating memory usage based on voltage regulator efficiency are disclosed. According to an aspect, a method may include receiving a first efficiency value of a first voltage regulator associated with a first memory device among multiple memory devices. The method may also include receiving a second efficiency value of a second voltage regulator associated with a second memory device of the memory devices. The method may also include receiving a request to write data to one of the first memory devices and the second memory device. The method may also include determining whether to write the data to the first memory device or the second memory device based on the first and second efficiency values. Further, the method may include writing the data to the first memory device or the second memory device based on the determination.
    Type: Application
    Filed: July 12, 2014
    Publication date: January 14, 2016
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Brian C. Totten
  • Patent number: 9195859
    Abstract: A method and computer program product secure a hot-swap data storage device against being manually physically removed from an operable position within a chassis bay of a computer system. The hot-swap data storage device is released to be manually physically removed from the operable position within the chassis bay of the computer system in response to determining that the data storage device is not active. The hot-swap data storage device may, for example, be secured and released using an electronically-actuated lock.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: November 24, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: James J. Parsonese, Jimmy X. Tang, Kevin S D Vernon
  • Publication number: 20150138722
    Abstract: A closed loop liquid cooling system for electronic packages, the closed loop liquid cooling system including: a fan impeller configured so that air flows from the fan impeller through a radiator of the closed loop liquid cooling system; an electric motor coupled to the fan impeller, the electric motor configured to rotate the fan impeller; and a pump impeller configured for delivering liquid to the electronic package via a cold plate, the pump impeller mechanically coupled to the fan impeller such that rotating the fan impeller causes the pump impeller to rotate such that liquid is circulated in the closed loop liquid cooling system.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Applicant: International Business Machines Corporation
    Inventors: MICHAEL D. FRENCH, JR., JAMES J. PARSONESE, KEVIN S.D. VERNON
  • Patent number: 9026685
    Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: May 5, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
  • Publication number: 20150050120
    Abstract: Methods and systems for fan speed control based on memory margin are disclosed. According to an aspect, a method includes determining an operating margin of a memory interface. The method also includes determining whether the operating margin of the memory interface meets a predetermined condition. Further, the method includes controlling a speed of a computing system cooling fan based on the operating margin in response to determining the operating margin meets the predetermined condition.
    Type: Application
    Filed: August 13, 2013
    Publication date: February 19, 2015
    Applicant: International Business Machines Corporation
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Philip L. Weinstein
  • Publication number: 20150046628
    Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.
    Type: Application
    Filed: August 7, 2013
    Publication date: February 12, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
  • Publication number: 20150046615
    Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.
    Type: Application
    Filed: August 8, 2013
    Publication date: February 12, 2015
    Applicant: International Business Machines Corporation
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman
  • Patent number: 8954619
    Abstract: Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: February 10, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Michael DeCesaris, James J. Parsonese, Luke D. Remis, Gregory D. Sellman