Patents by Inventor James J. Toomey
James J. Toomey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8362531Abstract: Method of patterning a semiconductor structure is disclosed. The method involves crystallographic etching techniques to enhance a patterned monocrystalline layer as a hard mask. In one embodiment, the method includes bonding a monocrystalline silicon layer to a non-crystalline protective layer; patterning the monocrystalline layer to form a hard mask; enhancing the pattern of the hard mask; stripping the hard mask after conventional etching of protective layer; and forming a gate oxide thereon. The enhanced patterning of the hard mask is performed with crystallographic etching to replace optical effects of rounding and dimension narrowing at the ends of a defined region with straight edges and sharp corners. A resulting structure from the use of the enhanced patterned hard mask includes a layer of composite materials on the substrate of the semiconductor structure. The layer of composite materials includes different materials in discrete blocks defined by straight edges within the layer.Type: GrantFiled: May 5, 2011Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Thomas W. Dyer, James J. Toomey
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Patent number: 8178931Abstract: A method and apparatus for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one or more intermediate metal pillars disposed between and in electrical contact with an upper end of the metal pillars; and one or more separation regions of dielectric disposed below the intermediate metal pillar and between the lower ends of the first and second metal pillars.Type: GrantFiled: December 16, 2008Date of Patent: May 15, 2012Assignee: International Business Machines CorporationInventor: James J. Toomey
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Publication number: 20110215437Abstract: Method of patterning a semiconductor structure is disclosed. The method involves crystallographic etching techniques to enhance a patterned monocrystalline layer as a hard mask. In one embodiment, the method includes bonding a monocrystalline silicon layer to a non-crystalline protective layer; patterning the monocrystalline layer to form a hard mask; enhancing the pattern of the hard mask; stripping the hard mask after conventional etching of protective layer; and forming a gate oxide thereon. The enhanced patterning of the hard mask is performed with crystallographic etching to replace optical effects of rounding and dimension narrowing at the ends of a defined region with straight edges and sharp corners. A resulting structure from the use of the enhanced patterned hard mask includes a layer of composite materials on the substrate of the semiconductor structure. The layer of composite materials includes different materials in discrete blocks defined by straight edges within the layer.Type: ApplicationFiled: May 5, 2011Publication date: September 8, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas W. Dyer, James J. Toomey
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Patent number: 7989357Abstract: Method of patterning a semiconductor structure is disclosed. The method involves crystallographic etching techniques to enhance a patterned monocrystalline layer as a hard mask. In one embodiment, the method includes bonding a monocrystalline silicon layer to a non-crystalline protective layer; patterning the monocrystalline layer to form a hard mask; enhancing the pattern of the hard mask; stripping the hard mask after conventional etching of protective layer; and forming a gate oxide thereon. The enhanced patterning of the hard mask is performed with crystallographic etching to replace optical effects of rounding and dimension narrowing at the ends of a defined region with straight edges and sharp corners. A resulting structure from the use of the enhanced patterned hard mask includes a layer of composite materials on the substrate of the semiconductor structure. The layer of composite materials includes different materials in discrete blocks defined by straight edges within the layer.Type: GrantFiled: December 5, 2007Date of Patent: August 2, 2011Assignee: International Business Machines CorporationInventors: Thomas W. Dyer, James J. Toomey
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Patent number: 7736966Abstract: The present invention relates to a method of fabricating a semiconductor substrate that includes forming at least first and second device regions, wherein the first device region includes a first recess having interior surfaces oriented along a first set of equivalent crystal planes, and wherein the second device region includes a second recess having interior surfaces oriented along a second, different set of equivalent crystal planes. The semiconductor device structure formed using such a semiconductor substrate includes at least one n-channel field effect transistor (n-FET) formed at the first device region having a channel that extends along the interior surfaces of the first recess, and at least one p-channel field effect transistor (p-FET) formed at the second device region having a channel that extends along the interior surfaces of the second recess.Type: GrantFiled: January 2, 2008Date of Patent: June 15, 2010Assignee: International Business Machines CorporationInventors: Thomas W. Dyer, Xiangdong Chen, James J. Toomey, Haining S. Yang
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Patent number: 7718993Abstract: A method for producing predetermined shapes in a crystalline Si-containing material that have substantially uniform straight sides or edges and well-defined inside and outside corners is provided together with the structure that is formed utilizing the method of the present invention. The inventive method utilizes conventional photolithography and etching to transfer a pattern, i.e., shape, to a crystalline Si-containing material. Since conventional processing is used, the patterns have the inherent limitations of rounded corners. A selective etching process utilizing a solution of diluted ammonium hydroxide is used to eliminate the rounded corners providing a final shape that has substantially straight sides or edges and substantially rounded corners.Type: GrantFiled: April 24, 2008Date of Patent: May 18, 2010Assignee: International Business Machines CorporationInventors: Thomas W. Dyer, Kenneth T. Settlemyer, James J. Toomey, Haining Yang
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Publication number: 20090146221Abstract: Method of patterning a semiconductor structure is disclosed. The method involves crystallographic etching techniques to enhance a patterned monocrystalline layer as a hard mask. In one embodiment, the method includes bonding a monocrystalline silicon layer to a non-crystalline protective layer; patterning the monocrystalline layer to form a hard mask; enhancing the pattern of the hard mask; stripping the hard mask after conventional etching of protective layer; and forming a gate oxide thereon. The enhanced patterning of the hard mask is performed with crystallographic etching to replace optical effects of rounding and dimension narrowing at the ends of a defined region with straight edges and sharp corners. A resulting structure from the use of the enhanced patterned hard mask includes a layer of composite materials on the substrate of the semiconductor structure. The layer of composite materials includes different materials in discrete blocks defined by straight edges within the layer.Type: ApplicationFiled: December 5, 2007Publication date: June 11, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas W. Dyer, James J. Toomey
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Publication number: 20090121357Abstract: A design structure for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one or more intermediate metal pillars disposed between and in electrical contact with an upper end of the metal pillars; and one or more separation regions of dielectric disposed below the intermediate metal pillar and between the lower ends of the first and second metal pillars.Type: ApplicationFiled: November 8, 2007Publication date: May 14, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: James J. Toomey
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Publication number: 20090096101Abstract: A method and apparatus for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one or more intermediate metal pillars disposed between and in electrical contact with an upper end of the metal pillars; and one or more separation regions of dielectric disposed below the intermediate metal pillar and between the lower ends of the first and second metal pillars.Type: ApplicationFiled: December 16, 2008Publication date: April 16, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: James J. Toomey
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Patent number: 7510960Abstract: A method and apparatus for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one or more intermediate metal pillars disposed between and in electrical contact with an upper end of the metal pillars; and one or more separation regions of dielectric disposed below the intermediate metal pillar and between the lower ends of the first and second metal pillars.Type: GrantFiled: August 29, 2006Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventor: James J. Toomey
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Patent number: 7456450Abstract: The present invention relates to a semiconductor substrate comprising at least first and second device regions, wherein the first device region comprises a first recess having interior surfaces oriented along a first set of equivalent crystal planes, and wherein the second device region comprises a second recess having interior surfaces oriented along a second, different set of equivalent crystal planes. A semiconductor device structure can be formed using such a semiconductor substrate. Specifically, at least one n-channel field effect transistor (n-FET) can be formed at the first device region, which comprises a channel that extends along the interior surfaces of the first recess. At least one p-channel field effect transistor (p-FET) can be formed at the second device region, which comprises a channel that extends along the interior surfaces of the second recess.Type: GrantFiled: February 9, 2006Date of Patent: November 25, 2008Assignee: International Business Machines CorporationInventors: Thomas W. Dyer, Xiangdong Chen, James J. Toomey, Haining S. Yang
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Publication number: 20080230868Abstract: A method for producing predetermined shapes in a crystalline Si-containing material that have substantially uniform straight sides or edges and well-defined inside and outside corners is provided together with the structure that is formed utilizing the method of the present invention. The inventive method utilizes conventional photolithography and etching to transfer a pattern, i.e., shape, to a crystalline Si-containing material. Since conventional processing is used, the patterns have the inherent limitations of rounded corners. A selective etching process utilizing a solution of diluted ammonium hydroxide is used to eliminate the rounded corners providing a final shape that has substantially straight sides or edges and substantially rounded corners.Type: ApplicationFiled: April 24, 2008Publication date: September 25, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas W. Dyer, Kenneth T. Settlemyer, James J. Toomey, Haining Yang
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Patent number: 7390745Abstract: A method for producing predetermined shapes in a crystalline Si-containing material that have substantially uniform straight sides or edges and well-defined inside and outside corners is provided together with the structure that is formed utilizing the method of the present invention. The inventive method utilizes conventional photolithography and etching to transfer a pattern, i.e., shape, to a crystalline Si-containing material. Since conventional processing is used, the patterns have the inherent limitations of rounded corners. A selective etching process utilizing a solution of diluted ammonium hydroxide is used to eliminate the rounded corners providing a final shape that has substantially straight sides or edges and substantially rounded corners.Type: GrantFiled: September 23, 2005Date of Patent: June 24, 2008Assignee: International Business Machines CorporationInventors: Thomas W. Dyer, Kenneth T. Settlemyer, Jr., James J. Toomey, Haining Yang
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Publication number: 20080054392Abstract: A method and apparatus for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one or more intermediate metal pillars disposed between and in electrical contact with an upper end of the metal pillars; and one or more separation regions of dielectric disposed below the intermediate metal pillar and between the lower ends of the first and second metal pillars.Type: ApplicationFiled: August 29, 2006Publication date: March 6, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: James J. Toomey
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Patent number: 6660664Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.Type: GrantFiled: March 31, 2000Date of Patent: December 9, 2003Assignee: International Business Machines Corp.Inventors: James W. Adkisson, Arne W. Ballantine, Matthew D. Gallagher, Peter J. Geiss, Jeffrey D. Gilbert, Shwu-Jen Jeng, Donna K. Johnson, Robb A. Johnson, Glen L. Miles, Kirk D. Peterson, James J. Toomey, Tina Wagner