Abstract: An apparatus and methodology for a back end of line (BEOL) structure in an integrated circuit (IC) die, includes a first BEOL structure layer having a first plurality of self-referential marking features disposed a first distance from a substrate of the IC die in a predefined two-dimensional (2D) arrangement. A second BEOL structure layer has a second plurality of the self-referential marking features a second distance from the substrate in a predefined 2D arrangement. The first and second pluralities of marking features collectively form a three-dimensional (3D) BEOL identifier (3D BEOL ID) self-referencing the IC die.

Abstract: Embodiments of the invention provide a method that includes forming an IC layer having an inactive region and an active region. The active region includes a device-under-fabrication (DUF). The inactive region includes a geometric feature having a geometric shape. A film is deposited over the active DUF and the geometric feature such that a first portion of the film will be part of the active DUF, and such that a second portion of the film is over the geometric feature. A geometric shape of the film over the geometric feature matches the geometric shape of the geometric feature. Determining a thickness of the film is based at least in part a difference between a footprint of the geometric shape of the film and a footprint of the geometric shape of the geometric feature.

Abstract: Embodiments of the invention provide a method that includes forming an IC layer having an inactive region and an active region. The active region includes a device-under-fabrication (DUF). The inactive region includes a geometric feature having a geometric shape. A film is deposited over the active DUF and the geometric feature such that a first portion of the film will be part of the active DUF, and such that a second portion of the film is over the geometric feature. A geometric shape of the film over the geometric feature matches the geometric shape of the geometric feature. Determining a thickness of the film is based at least in part a difference between a footprint of the geometric shape of the film and a footprint of the geometric shape of the geometric feature.

Abstract: A system for performing diffraction analysis, includes a mill for removing a surface portion of a sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing diffraction analysis, includes a mill for removing a surface portion of a sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing diffraction analysis, includes a focused ion beam (FIB) device for preparing a sample, a mill for removing a surface portion of the prepared sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing diffraction analysis, includes a focused ion beam (FIB) device for preparing a sample, a mill for removing a surface portion of the prepared sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing nano beam diffraction (NBD) analysis, includes a focused ion beam (FIB) device for preparing a transmission electron microscopy (TEM) sample, a broad beam ion mill for milling the TEM sample to remove a surface portion of the TEM sample, and a strain analyzer for performing NBD analysis on the milled TEM sample to acquire diffraction data.

Abstract: A system for performing nano beam diffraction (NBD) analysis, includes a focused ion beam (FIB) device for preparing a transmission electron microscopy (TEM) sample, a broad beam ion mill for milling the TEM sample to remove a surface portion of the TEM sample, and a strain analyzer for performing NBD analysis on the milled TEM sample to acquire diffraction data.

Abstract: A structure and method for forming a dual metal fill and dual threshold voltage for replacement gate metal devices is disclosed. A selective deposition process involving titanium and aluminum is used to allow formation of two adjacent transistors with different fill metals and different workfunction metals, enabling different threshold voltages in the adjacent transistors.

Abstract: A structure and method for forming a dual metal fill and dual threshold voltage for replacement gate metal devices is disclosed. A selective deposition process involving titanium and aluminum is used to allow formation of two adjacent transistors with different fill metals and different workfunction metals, enabling different threshold voltages in the adjacent transistors.

Abstract: A structure and method for forming a dual metal fill and dual threshold voltage for replacement gate metal devices is disclosed. A selective deposition process involving titanium and aluminum is used to allow formation of two adjacent transistors with different fill metals and different workfunction metals, enabling different threshold voltages in the adjacent transistors.