Patents by Inventor James Joseph Chambers

James Joseph Chambers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10439040
    Abstract: A process is disclosed of forming metal replacement gates for PMOS transistors with oxygen in the metal gates such that the PMOS gates have effective work functions above 4.85. Metal work function layers in the PMOS gates are oxidized at low temperature to increase their effective work functions to the desired PMOS range. Hydrogen may also be incorporated at an interface between the metal gates and underlying gate dielectrics. Materials for the metal work function layers and processes for the low temperature oxidation are disclosed.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: October 8, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Patent number: 10068983
    Abstract: An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer and a metal work function layer of a PMOS transistor. The nitrogen-rich titanium-based barrier is less than 1 nanometer thick and has an atomic ratio of titanium to nitrogen of less than 43:57. The nitrogen-rich titanium-based barrier may be formed by forming a titanium based layer over the gate dielectric layer and subsequently adding nitrogen to the titanium based layer. The metal work function layer is formed over the nitrogen-rich titanium-based barrier.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: September 4, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATION
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Publication number: 20170301774
    Abstract: A process is disclosed of forming metal replacement gates for PMOS transistors with oxygen in the metal gates such that the PMOS gates have effective work functions above 4.85. Metal work function layers in the PMOS gates are oxidized at low temperature to increase their effective work functions to the desired PMOS range. Hydrogen may also be incorporated at an interface between the metal gates and underlying gate dielectrics. Materials for the metal work function layers and processes for the low temperature oxidation are disclosed.
    Type: Application
    Filed: June 28, 2017
    Publication date: October 19, 2017
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Patent number: 9721796
    Abstract: A process is disclosed of forming metal replacement gates for PMOS transistors with oxygen in the metal gates such that the PMOS gates have effective work functions above 4.85. Metal work function layers in the PMOS gates are oxidized at low temperature to increase their effective work functions to the desired PMOS range. Hydrogen may also be incorporated at an interface between the metal gates and underlying gate dielectrics. Materials for the metal work function layers and processes for the low temperature oxidation are disclosed.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: August 1, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Publication number: 20160336422
    Abstract: An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer and a metal work function layer of a PMOS transistor. The nitrogen-rich titanium-based barrier is less than 1 nanometer thick and has an atomic ratio of titanium to nitrogen of less than 43:57. The nitrogen-rich titanium-based barrier may be formed by forming a titanium based layer over the gate dielectric layer and subsequently adding nitrogen to the titanium based layer. The metal work function layer is formed over the nitrogen-rich titanium-based barrier.
    Type: Application
    Filed: July 28, 2016
    Publication date: November 17, 2016
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Patent number: 9431509
    Abstract: An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer and a metal work function layer of a PMOS transistor. The nitrogen-rich titanium-based barrier is less than 1 nanometer thick and has an atomic ratio of titanium to nitrogen of less than 43:57. The nitrogen-rich titanium-based barrier may be formed by forming a titanium based layer over the gate dielectric layer and subsequently adding nitrogen to the titanium based layer. The metal work function layer is formed over the nitrogen-rich titanium-based barrier.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: August 30, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Patent number: 9397009
    Abstract: A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: July 19, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: James Joseph Chambers, Hiroaki Niimi
  • Publication number: 20160042953
    Abstract: A process is disclosed of forming metal replacement gates for PMOS transistors with oxygen in the metal gates such that the PMOS gates have effective work functions above 4.85. Metal work function layers in the PMOS gates are oxidized at low temperature to increase their effective work functions to the desired PMOS range. Hydrogen may also be incorporated at an interface between the metal gates and underlying gate dielectrics. Materials for the metal work function layers and processes for the low temperature oxidation are disclosed.
    Type: Application
    Filed: October 26, 2015
    Publication date: February 11, 2016
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Patent number: 9202884
    Abstract: A process is disclosed of forming metal replacement gates for PMOS transistors with oxygen in the metal gates such that the PMOS gates have effective work functions above 4.85. Metal work function layers in the PMOS gates are oxidized at low temperature to increase their effective work functions to the desired PMOS range. Hydrogen may also be incorporated at an interface between the metal gates and underlying gate dielectrics. Materials for the metal work function layers and processes for the low temperature oxidation are disclosed.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: December 1, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Publication number: 20150311126
    Abstract: A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
    Type: Application
    Filed: June 15, 2015
    Publication date: October 29, 2015
    Inventors: James Joseph Chambers, Hiroaki Niimi
  • Patent number: 9087918
    Abstract: A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: July 21, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: James Joseph Chambers, Hiroaki Niimi
  • Patent number: 8828825
    Abstract: The likelihood of forming silicon germanium abnormal growths, which can be undesirably formed on the gate electrode of a strained-channel PMOS transistor at the same time that silicon germanium source and drain regions are formed, is substantially reduced by using protection materials that reduce the likelihood that the gate electrode is exposed during the formation of the silicon germanium source and drain regions.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: September 9, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Publication number: 20140183653
    Abstract: An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer and a metal work function layer of a PMOS transistor. The nitrogen-rich titanium-based barrier is less than 1 nanometer thick and has an atomic ratio of titanium to nitrogen of less than 43:57. The nitrogen-rich titanium-based barrier may be formed by forming a titanium based layer over the gate dielectric layer and subsequently adding nitrogen to the titanium based layer. The metal work function layer is formed over the nitrogen-rich titanium-based barrier.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 3, 2014
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Patent number: 8748996
    Abstract: An integrated circuit (IC) includes a substrate having a top semiconductor surface including at least one MOS device including a source and a drain region spaced apart to define a channel region. A SiON gate dielectric layer that has a plurality of different N concentration portions is formed on the top semiconductor surface. A gate electrode is on the SiON layer. The plurality of different N concentration portions include (i) a bottom portion extending to the semiconductor interface having an average N concentration of <2 atomic %, (ii) a bulk portion having an average N concentration >10 atomic %, and (iii) a top portion on the bulk portion extending to a gate electrode interface having an average N concentration that is ?2 atomic % less than a peak N concentration of the bulk portion.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: June 10, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: James Joseph Chambers, Hiroaki Niimi, Brian Keith Kirkpatrick
  • Patent number: 8748992
    Abstract: A method of forming an integrated circuit (IC) having at least one MOS device includes forming a SiON gate dielectric layer on a silicon surface. A gate electrode layer is deposited on the SiON gate layer and then patterning forms a gate stack. Exposed gate dielectric sidewalls are revealed by the patterning. A supplemental silicon oxide layer is formed on the exposed SiON sidewalls followed by nitriding. After nitriding, a post nitridation annealing (PNA) forms an annealed N-enhanced SiON gate dielectric layer including N-enhanced SiON sidewalls, wherein along lines of constant thickness a N concentration at the N-enhanced SiON sidewalls is ? the N concentration in a bulk of the annealed N-enhanced SiON gate layer ?2 atomic %. A source and drain region on opposing sides of the gate stack are formed to define a channel region under the gate stack.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: June 10, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Brian K. Kirkpatrick, James Joseph Chambers
  • Publication number: 20140120668
    Abstract: A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
    Type: Application
    Filed: January 2, 2014
    Publication date: May 1, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: James Joseph Chambers, Hiroaki Niimi
  • Patent number: 8658489
    Abstract: A CMOS device having an NMOS transistor with a metal gate electrode comprising a mid-gap metal with a low work function/high oxygen affinity cap and a PMOS transistor with a metal gate electrode comprising a mid gap metal with a high work function/low oxygen affinity cap and method of forming.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: February 25, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: James Joseph Chambers, Hiroaki Niimi
  • Patent number: 8643113
    Abstract: A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: February 4, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: James Joseph Chambers, Hiroaki Niimi
  • Publication number: 20140017866
    Abstract: The likelihood of forming silicon germanium abnormal growths, which can be undesirably formed on the gate electrode of a strained-channel PMOS transistor at the same time that silicon germanium source and drain regions are formed, is substantially reduced by using protection materials that reduce the likelihood that the gate electrode is exposed during the formation of the silicon germanium source and drain regions.
    Type: Application
    Filed: July 16, 2012
    Publication date: January 16, 2014
    Inventors: Hiroaki Niimi, James Joseph Chambers
  • Publication number: 20130337656
    Abstract: A CMOS device having an NMOS transistor with a metal gate electrode comprising a mid-gap metal with a low work function/high oxygen affinity cap and a PMOS transistor with a metal gate electrode comprising a mid gap metal with a high work function/low oxygen affinity cap and method of forming.
    Type: Application
    Filed: August 15, 2013
    Publication date: December 19, 2013
    Applicant: Texas Instruments Incorporated
    Inventors: James Joseph Chambers, Hiroaki Niimi