Patents by Inventor James Joseph Morra

James Joseph Morra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Constant Vgs analog switch
    Patent number: 8547159
    Abstract: Apparatus and methods for a switch circuit to provide a substantially constant gate-to source voltage to a passgate are provided. In an example, a switch circuit includes a summing circuit having an output configured to couple to the gate of a passgate, the summing circuit can be configured to maintain a substantially constant voltage between the gate and the source of the pass gate.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: October 1, 2013
    Assignee: Fairchild Semiconductor Corporation
    Inventor: James Joseph Morra
  • Power down enabled analog switch
    Patent number: 8502595
    Abstract: This document discusses, among other things, apparatus and methods for passing a signal in a power down state. An example switch device can include a first depletion-mode transistor configured to pass an analog signal between a first node and a second node in a first state and to isolate the first node from the second node in a second state, a control circuit coupled to a control node of the first depletion-mode transistor and configured to isolate the control node from a first supply input in the first state and to couple the control node to the first supply input in the second state, and a tracking circuit configured to couple the control node of the first depletion-mode transistor to the first node during the first state and to isolate the control node of the first depletion-mode transistor from the first node in the second state.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 6, 2013
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Julie Lynn Stultz, James Joseph Morra, Steven Macaluso
  • CONSTANT VGS ANALOG SWITCH
    Publication number: 20120286845
    Abstract: Apparatus and methods for a switch circuit to provide a substantially constant gate-to source voltage to a passgate are provided. In an example, a switch circuit includes a summing circuit having an output configured to couple to the gate of a passgate, the summing circuit can be configured to maintain a substantially constant voltage between the gate and the source of the pass gate.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 15, 2012
    Inventor: James Joseph Morra
  • POWER DOWN ENABLED ANALOG SWITCH
    Publication number: 20120242397
    Abstract: This document discusses, among other things, apparatus and methods for passing a signal in a power down state. An example switch device can include a first depletion-mode transistor configured to pass an analog signal between a first node and a second node in a first state and to isolate the first node from the second node in a second state, a control circuit coupled to a control node of the first depletion-mode transistor and configured to isolate the control node from a first supply input in the first state and to couple the control node to the first supply input in the second state, and a tracking circuit configured to couple the control node of the first depletion-mode transistor to the first node during the first state and to isolate the control node of the first depletion-mode transistor from the first node in the second state.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 27, 2012
    Inventors: Julie Lynn Stultz, James Joseph Morra, Steven Macaluso