Patents by Inventor James Joseph

James Joseph has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7264273
    Abstract: A ballast system for use in a cargo bed of a vehicle, such as a pick-up truck, provides generally even weight distribution over rear or powered wheels of the vehicle. The ballast system provides additional weight to the cargo bed of the vehicle, thereby improving stability, handling, and rear wheel traction, especially during inclement weather, such as in snow or rain. The ballast system may be rolled-up into a compact roll during non-use for convenient storage. The ballast system has a plurality of weighted cross-members laminated, attached, or bonded between two generally pliable mats. The cross-members are, preferably, equally spaced apart from each other along widths of the mats and transverse to a longitudinal direction of the cargo bed of the vehicle. The ballast system is readily rolled-up into a compact roll for convenient storage.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: September 4, 2007
    Inventors: James Joseph Ryan, III, Jennifer Anne Ryan
  • Publication number: 20070193530
    Abstract: A device for the removal of pet and human hairs from hard to reach places such as crevices, narrow openings and folds in upholstery, as well as from confined clothing areas such as pockets is disclosed. The pet hair removal device comprises a flexible elongated handle body having a hand grip end portion together with an opposing pet hair collector end portion on the handle. The handle has an elongated flexible shaft and a pet hair collection member secured to the collector portion of the handle. The collection member is adapted to engage and retain pet hair on the pet hair removal device for removal from the item or surface being cleaned. The pet hair removal device can be manually cleaned of pet hair and reused.
    Type: Application
    Filed: September 8, 2006
    Publication date: August 23, 2007
    Inventor: James Joseph Deroo
  • Patent number: 7259474
    Abstract: A method and apparatus for aggregating power from multiple sources generates a single direct current regulated voltage. The apparatus comprises a plurality of slave voltage converters and a master pulse width modulator circuit. Providing a plurality of direct current power sources, current is drawn through a plurality of lines connected to the plurality of direct current power sources. An open circuit voltage for each direct current power source is unknown. Each line of the plurality of lines has a line resistance. The line resistance of at least some of the plurality of lines may be unknown. The line resistance of at least some of the plurality of lines is large. The single direct current regulated voltage is generated from the drawn current.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: August 21, 2007
    Assignee: UTStarcom, Inc.
    Inventor: James Joseph Blanc
  • Patent number: 7255762
    Abstract: The present invention is directed to a camouflage tire suitable for use in various vehicle use environments wherein it is desirable to reduce or eliminate a viewer's visual perception of the tire against the given environmental background.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: August 14, 2007
    Assignee: The Goodyear Tire & Rubber Company
    Inventors: David John Zanzig, David Andrew Benko, James Joseph Nespo, Terry John Waibel, Michael Julian Crawford, Timothy Michael Rooney, Bina Patel Botts, George Frank Balogh
  • Publication number: 20070150254
    Abstract: A method of simulating performance characteristics of a product to be manufactured includes identifying a plurality of simulation modules each representative of one or more components of the product. The method also includes linking the plurality of simulation modules together to provide a model capable of generating an output associated with one or more performance characteristics of the product and running at least some of the simulation models in parallel to provide performance information related to the one or more performance characteristics of the product. The method can also include outputting the performance information.
    Type: Application
    Filed: October 31, 2006
    Publication date: June 28, 2007
    Inventors: Cathy Y. Choi, Stephen A. Faulkner, William Kent Rutan, James Joseph Faletti, Eric C. Fluga, Robert Michael McDavid, Donald B. Edwards, Mark D. Anderson, Adam John Covell
  • Patent number: 7234702
    Abstract: The present invention relates to a game table with a plurality of player stations with an integral lighting system. The game table, for example, a poker table, includes a light window adjacent all of the player stations. An illumination device is fixedly disposed beneath the light window. With such a configuration, lighting is provided from beneath the table, which minimizes shadows during television taping.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: June 26, 2007
    Assignee: WPT Enterprises, Inc.
    Inventors: Steven Roy Lipscomb, John Michael Conti, James Joseph Cuomo
  • Patent number: 7226830
    Abstract: The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. A first oxide layer is formed in core and I/O regions of a semiconductor device (506). The first oxide layer is removed (508) from the core region of the device. A high-k dielectric layer is formed (510) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions of the core and I/O regions. A second oxide layer is formed (516) within NMOS regions of the core and I/O regions and a nitridation process is performed (518) that nitrides the second oxide layer and the high-k dielectric layer.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: June 5, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Luigi Colombo, James Joseph Chambers, Mark Robert Visokay
  • Patent number: 7220145
    Abstract: A patch panel system is provided that comprises a frame, a patch panel and connector ports. The patch panel is attached to the frame and has first and second connectivity interfaces. The first connectivity interface has multiple sections joined to form an N-sided portion of a polygon where N is greater than 2. The connector ports are provided at the first connectivity interface. The sections of the first connectivity interface have planar front surfaces that are oriented at obtuse angles to one another.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: May 22, 2007
    Assignee: Tyco Electronics Corporation
    Inventors: Sam Denovich, James Joseph Eberle, Jr., Michael Patrick Green, John Carey Hoffer
  • Patent number: 7206808
    Abstract: A video network platform manages video network devices with management applications, such as scheduling, monitoring and diagnostics applications, by representing the devices as interface objects that support a network interface module, and application objects used by the management applications and created by an adapter engine that creates an application object for each corresponding video network device interface object. A network interface module associated with the video network platform invokes the adapter engine to create an application object associated with a device. The application object uses its dynamic attribute query capabilities to build an interface object in the network interface module and thus obtain device attributes such as device address information. The application module populates itself with device information for supporting management applications, thus allowing conventional network interface modules to cooperate with application specific objects.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: April 17, 2007
    Assignee: Tandberg Telecom AS
    Inventors: James Joseph Babka, Kurtis L Seebaldt
  • Patent number: 7195518
    Abstract: A connector includes a housing having a mating end, a wire receiving end, and a longitudinal axis therethrough. The housing holds a plurality of contacts grouped in differential pairs and arranged about the axis. At least one shielding member is located within the housing. The shielding member isolates each differential contact pair from an adjacent differential contact pair. An organizer is configured for attachment to the wire receiving end of the housing. The organizer defines a central opening that receives a plurality of signal wires carrying differential signals. The organizer includes a plurality of wire guides arranged about and extending radially outward from the central opening. The wire guides receive the signal wires.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: March 27, 2007
    Assignee: Tyco Electronics Corporation
    Inventors: Linda Ellen Bert, Sam Denovich, James Joseph Eberle, Jr., Ralph Sykes Martin, Michael Patrick Green
  • Patent number: 7177447
    Abstract: A multi-stage infrared (IR) image-based tracking system is provided that accurately identifies and tracks targets across a variety of different situations and environmental conditions. The system includes primary and secondary trackers. The secondary tracker supports the primary tracker by identifying and tracking targets when the primary tracker loses or fails to identify one or more targets, and helps the primary tracker reacquire valid targets. In an exemplary embodiment of the invention, the primary tracker is a correlation-based tracker, and the secondary tracker is a feature-based tracker. A prescreener is also included, which operates concurrently with the correlation-based and feature-based trackers to generate a list of possible targets. The list can be used to provide a confidence level for the probable targets identified by each of the primary and secondary trackers.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: February 13, 2007
    Assignee: Lockheed Martin Corporation
    Inventors: Teresa Lorae Pace Olson, James Joseph Slaski, Carl William Sanford, Ruey-Yuan Han, Casey Leonard Contini, Robert Russell Reinig
  • Patent number: 7176076
    Abstract: The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An I/O dielectric layer is formed in core and I/O regions of a semiconductor device (506). The I/O dielectric layer is removed (508) from the core region of the device. A core dielectric layer is formed in the core region (510). A barrier layer is deposited and patterned to expose the NMOS devices of the core region (512). The core dielectric layer is removed from the core NMOS devices (514). A high-k dielectric layer is formed (514) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions/devices of the core region and the NMOS and PMOS regions/devices of the I/O region.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: February 13, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: James Joseph Chambers, Mark Robert Visokay, Luigi Colombo
  • Publication number: 20070030789
    Abstract: The invention pertains to a method off controlling radiation power of a radiation source (25) comprising the steps of a) measuring a radiated power of the radiation source (25), b) calculating an error value (e) which is indicative of a difference between the 5 radiated power and a setpoint value (SP), c) integrating the error value (e) to obtain an integrated error value by feeding the error value to an integrator (21), d) multiplying the error value (e) with a factor p to obtain a proportional error value, driving the radiation source (25) with a current which is derived from the error value (e) by adding the integrated error value and the proportional error value, f) providing a step signal (St) which indicates that the setpoint value (SP) is changed stepwise, and g) temporarily stopping the integration of the error value (e) when the step signal (St) indicates a stepwise change in the setpoint value (SP). By temporarily stopping the integrator (21) from integrating the integrator (21) does not wind up.
    Type: Application
    Filed: May 13, 2004
    Publication date: February 8, 2007
    Inventor: James Joseph McCormack
  • Patent number: 7171575
    Abstract: A DLL provides a deskew mode for aligning a reference clock that passes through a clock distribution tree to a feedback by adding additional delay to the feedback clock to align the feedback clock with reference clock at one cycle later. A 0 ns clock-to-out mode is provided by adding additional delay to account for an input buffer into a feedback path. The feedback clock can be doubled by a clock doubler with 50% duty cycle adjustment disposed in the feedback path. Flexible timing is aligning the reference clock to the feedback clock is obtained with additional delay elements disposed in the feedback and reference clock paths.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: January 30, 2007
    Assignee: Actel Corporation
    Inventors: William C. Plants, Nikhil Mazumder, Arunangshu Kundu, James Joseph, Wayne W. Wong
  • Patent number: 7170412
    Abstract: An object location system and method is provided for locating objects. The system includes an RFID reader, an angle calculator, and a distance calculator to determine which of a plurality of zones an object is located in or passing through. An RFID tag is affixed with the object that is to be located. The RFID reader transmits signals to the RFID tag and receives backscatter-modulated signals from the RFID tag at one or more RFID antennas. From those received signals, the angle calculator determines an angle of position of the RFID tag relative to the RFID antenna. From the angle of position the zone in which the object is located is determined.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: January 30, 2007
    Assignee: Symbol Technologies, Inc.
    Inventors: Michael Knox, Raj Bridgelall, Mark William Duron, Richard T. Knadle, Jr., James Joseph Bender
  • Patent number: 7138947
    Abstract: A dual polarised antenna 1 has two types of antenna elements combined. Each type of antenna element is formed on a planar substrate. The substrates are furnished with inter-engaging slots to enable assembly of the elements. Signal feeds are connected to the active parts of the elements by means of connection points furnished at off axis positions. The off-axis positions for connection enable an arrangement in which the locus of the effective phase centres of the antenna element scan be co-located yielding a convenient arrangement with good performance.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: November 21, 2006
    Assignee: Roke Manor Research Limited
    Inventors: James Joseph Fisher, Roderick Leonard Wallace Stevens
  • Patent number: 7121991
    Abstract: A bottom sealing workstation is provided for a cup forming machine. The bottom sealing workstation has a linear motion assembly, a rotation assembly, a phase change assembly. A first motor is mechanically connected to a linear motion assembly of the bottom sealing workstation to linearly move the linear motion assembly toward a mandrel, a second motor is mechanically connected to a rotation assembly of the bottom sealing workstation to rotate a forming tool in a circle having a radius, and a third motor is mechanically connected to the phase change assembly to adjust the radius of the circle in which the forming tool rotates. Additionally, a controller may be electrically connected to the bottom sealing workstation to send electronic signals to the first and third motors to quantitatively control various assemblies of the bottom sealing workstation.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: October 17, 2006
    Assignee: Solo Cup Operating Corporation
    Inventors: Dean Joseph Mannlein, James Joseph Mitchell
  • Patent number: 7123808
    Abstract: A cable management system includes an equipment system, and at least one patch panel having a connectivity interface. The connectivity interface is configured to connect with at least one cable extending from the equipment system. The cable management system also includes a manifold configured to be located between the equipment system and the patch panel. The manifold includes an inlet and an outlet, and the manifold is configured to direct the at least one cable from the equipment system to the connectivity interface.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: October 17, 2006
    Assignee: Tyco Electronics Corporation
    Inventors: Sam Denovich, Bruce Eltringham Barry, James Joseph Eberle, Jr., John Carey Hoffer
  • Patent number: 7105103
    Abstract: A method for manufacturing surgical blades from either a crystalline or poly-crystalline material, preferably in the form of a wafer, is disclosed. The method includes preparing the crystalline or poly-crystalline wafers by mounting them and machining trenches into the wafers. The methods for machining the trenches, which form the bevel blade surfaces, include a diamond blade saw, laser system, ultrasonic machine, and a hot forge press. The wafers are then placed in an etchant solution which isotropically etches the wafers in a uniform manner, such that layers of crystalline or poly-crystalline material are removed uniformly, producing single or double bevel blades. Nearly any angle can be machined into the wafer which remains after etching. The resulting radii of the blade edges is 5–500 nm, which is the same caliber as a diamond edged blade, but manufactured at a fraction of the cost.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: September 12, 2006
    Assignee: Becton, Dickinson and Company
    Inventors: Joseph Francis Keenan, Vadim Mark Daskal, James Joseph Hughes
  • Patent number: 7098693
    Abstract: A bi-directional voltage translator is disclosed. The bi-directional voltage translator includes a step-up voltage translator for converting signals of a first voltage level to signals of a second voltage level, and a step-down voltage translator for converting signals of the second voltage level to signals of the first voltage level. The step-up voltage translator includes a first source sense circuit, a first block feedback circuit and a first output driver circuit. The step-down voltage translator includes a second source sense circuit, a second block feedback circuit and a second output driver circuit.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: August 29, 2006
    Assignee: International Business Machines Corporation
    Inventors: Mark Elliot Andresen, Robert Joseph Christopher, James Joseph Parsonese, William Roff Thomas, Wilson Velez, David Eduardo Vieira, Menlo Wuu