Abstract: A circuit for testing the functionality of an analog circuit of a satellite includes a multiplexer that is coupled to a circuit element to be tested. An analog-to-digital converter is coupled to the multiplexer. A test signal generator is coupled to a controller. The controller is also coupled to the analog-to-digital converter. The controller generates test signals that are coupled to the circuit element. Response signals are generated from the circuit elements and are received by the controller through the multiplexer and analog-to-digital converter. The controller compares the response signals to a predetermined signal indicative of a proper response. An indicator is coupled to the controller to provide an indication of whether or not the circuit elements are functioning properly.

Abstract: An apparatus for launching separate mode groups comprising an LED (13) and a collimator (C.sub.1) for providing a first beam (19) of collimated light and an LED (15) and a collimator (C.sub.2) for providing a second beam (23) of collimated light. The beams (19) and (23) intersect and form an acute angle A. A light guide (R.sub.1) has a receiving face (27) at the intersection of the beams (19) and (23) so that the beams are launched into the light guide as first and second mode groups, respectively.

Abstract: A digital-to-analog converter system for converting a digital input signal having parallel words, each word including multi-bit groups of weighted significance, and which is provided at an input word rate of W Hz, is disclosed. The digital-to-analog converter system (10, 100, 200) includes pulse generating circuitry (11, 13, 111, 113, 211, 213) responsive to a first multi-bit group and a second multi-bit group of the digital input words for providing (a) a first pulse modulated signal as a function of the value of the first multi-bit group and (b) a second pulse modulated signal as a function of the value of the second multi-bit group; weighting elements (15, 19, 115, 119, 215, 219) for weighting the first and second pulse modulated signals as a function of the relative weighted significance of the first and second multi-bit groups; and output circuitry (20, 120, 220) for summing and filtering the weighted signals to provide an analog output signal that is representative of the digital input signal.