Abstract: A content-addressable memory (CAM) has a memory array for storing data, the memory array having E entries each having N data bits and a valid bit. The functionality of the CAM is tested by testing the memory array for read/write functionality. The functionality of a matching function, a priority encoding function, a match flag function, and a multiple match flag function of the CAM is tested. The functionality of an invalidate data function and a valid data restricted search function is also tested.

Abstract: A device (12), such as an A/D converter for generating successive codes, each in accordance with the level of an input analog voltage, may be tested to determine if all codes have been generated by applying a voltage V.sub.t having an amplitude that varies between 0 and V volts. The variation in the voltage V.sub.t is such that when the device (12) is operating properly, it will generate all of its codes during a predetermined interval. Each code generated by the device (12) is compared by a comparator (18) to the count of an n-bit counter (20) whose count is initialized at zero. Each time the count of the counter (20) matches the code produced by the device (12), the counter is incremented. If the counter overflows (i.e., its count has exceeded 2.sup.n -1) within a prescribed interval, then the device (12) is said to be operating properly.

Abstract: A technique is provided for routing paths (22) between selected pairs of test points (18) and probe points (20) on the exposed major surface of a fixture (10). The first step in the technique is to simulate a set of non-intersecting spokes (28) which link each test point to at least one arbitrary probe point (20). Next, a set of tracks (32) is superimposed on the spokes (28) such that each track is everywhere generally orthogonal to each spoke, thereby creating a grid in which the spokes and tracks intersect each other. A path (22) between a selected test point and probe point is then routed along at least a portion of the spokes and tracks in the grid by the use of a network flow technique.

Abstract: The present disclosure is directed to a technique for assigning each of a plurality of test points (34) on a first surface of a translator board (24) to an appropriate one of a set of grid points (36) on an opposed surface of the board. Such an assignment is accomplished by first mapping the grid points (36) and a successive one of the test points (34) into an array (49a) of uniformly spaced cells (49b). An initial group of cells (49b), surrounding the mapped test point (34), is then searched to locate the four grid points (36) closest to the test point. Among the four closest grid points (36), the one which satisfies a particular constraint is designated. A check is then made to determine whether the designated grid point (36) is appropriate for the test point (34). If so, the grid point (36) is assigned to the test point (34) and the grid point is removed from the array before mapping the next test point.