Abstract: A row driver circuit receives a first supply voltage and a second supply voltage. The circuit provides the first supply voltage on an output responsive to the first supply voltage being greater than a threshold value. The circuit generates a boosted voltage that is greater than the first supply voltage and provides that boosted voltage on the output responsive to the first supply voltage being less than the threshold value.

Abstract: A matrix H for encoding data words is defined for wide word ECC with uniform density and a reduced number of components. The H-matrix is incorporated in an encode unit operable to Hamming encode a data word with a 10×528 matrix generated in groups of four columns wherein; a first column is a complement of a second column; the value of the second column ranges from 9 to 271 in increments of two; a third column is a complement of a fourth column; and the value of the fourth column is the same as the value of the second column less one; and wherein a 528-bit bottom row is added to the 10×528 matrix comprising alternating zeroes and ones starting with a zero creating an 11×528 matrix.

Abstract: A parity generation circuit includes a plurality of bit-generation circuits. Each bit-generation circuit receives respective data bits and a respective hard latch signal, and operates to generate a parity signal indicating the parity of the corresponding data bits when the hard latch signal is inactive. Each bit-generation circuit drives the parity signal to a set value when the hard latch signal is active. An output circuit is coupled to the bit-generation circuits to receive the parity signals and operates to generate an output parity signal in response to the parity signals from the bit-generation circuits.

Abstract: A row driver circuit receives a supply voltage and operates to develop a boosted voltage having a magnitude that is equal to the sum of an incremental boost voltage and a magnitude of the supply voltage. The magnitude of the incremental boost voltage is a function of the magnitude of the supply voltage to maintain the boosted voltage at an approximately constant value independent of variations in the supply voltage. A method of generating a boosted voltage includes detecting a value of a supply voltage, generating an incremental boost voltage having a value that is a function of the detected supply voltage, and adding the generated incremental boost voltage to the supply voltage to generate the boosted voltage.

Abstract: A circuit and method are disclosed for controlling bootstrap circuitry that boosts a voltage level appearing on word lines of a dynamic random access memory device. During execution of a memory access operation, the circuit is adapted to enable the bootstrap circuitry a period of time following the memory device's sense amplifiers initially powering up. The circuit senses when the voltage appearing on a select bit line crosses a predetermined voltage level, and enables the bootstrap circuitry thereafter. In this way, a period of time elapses between the sense amplifiers turning on and the activation of the bootstrap circuitry, thereby reducing noise introduced from the sense amplifiers turning on from impacting the operation of the bootstrap circuitry.

Abstract: The invention may be incorporated into a method for forming a vertically oriented semiconductor device structure, and the semiconductor structure formed thereby, by forming a first transistor over a portion of a substrate wherein the first transistor has a gate electrode and a source and drain regions. First and second interconnect regions are formed over a portion of the gate electrode and a portion of the source and drain regions of the first transistor, respectively. A source and drain region of a second transistor is formed over the second interconnect. A Vcc conductive layer is formed over a portion of the source and drain region of the second transistor which is formed over the second interconnect.

Abstract: Composite layers of titanium silicide and polysilicon define a fuse resistor within a programmable fuse element that increases its resistance from about 50 ohms in the unprogrammed state to about 250 K-ohms in the programmed state by creating a discontinuity in the silicide layer immediately over a PN junction in the polysilicon layer. The resistance of the fuse resistor in the programmed state is determined by the reverse-biased diode characteristic of the PN junction. Portions of a metallic layer overlie portions of the fuse resistor except at the site of the PN junction in the polysilicon layer so that the silicide is preferentially heated immediately above the PN junction to cause the discontinuity to occur at that site. The metallic layer portions serve both as a heat sink for the underlying portions of the silicide layer and as electrical connections to the fuse resistor.