Abstract: A spread spectrum radio transceiver includes a high data rate baseband processor and a radio circuit connected thereto. The baseband processor preferably includes a modulator for spread spectrum phase shift keying (PSK) modulating information for transmission via the radio circuit. The modulator may include at least one modified Walsh code function encoder for encoding information according to a modified Walsh code for substantially reducing an average DC signal component to thereby enhance overall system performance when AC-coupling the received signal through at least one analog-to-digital converter to the demodulator. The demodulator is for spread spectrum PSK demodulating information received from the radio circuit. The modulator and demodulator are each preferably operable in one of a bi-phase PSK (BPSK) mode at a first data rate and a quadrature PSK (QPSK) mode at a second data rate. These formats may also be switched on-the-fly in the demodulator. Method aspects are also disclosed.

Abstract: An interpolator includes: a first quadratic coefficient generator for generating a first coefficient set fitting a first quadratic equation to input samples y.sub.0, y.sub.1 and y.sub.2 at x.sub.-1, x.sub.0, and x.sub.1, respectively; a second quadratic coefficient generator for generating a second coefficient set fitting a second quadratic equation to input samples y.sub.1, y.sub.2 and y.sub.3 at x.sub.0, x.sub.1 and x.sub.2, respectively; a bi-quadratic coefficient generator for generating a bi-quadratic coefficient set based upon the first and second coefficient sets; and an output circuit for generating an interpolated value for between x.sub.0 and x.sub.1 based upon the bi-quadratic coefficient set. The bi-quadratic generator preferably generates the bi-quadratic coefficient set based upon an average of the first and second coefficient sets. Accordingly, the bi-quadratic coefficient set of b.sub.0, b.sub.1 and b.sub.2 is given by b.sub.0 =y.sub.1, b.sub.1 =(-y.sub.3 +5y.sub.2 -3y.sub.1 -y.sub.

Abstract: A re-sampling circuit includes a poly-phase finite impulse response (FIR) interpolator; a polynomial interpolator having a sample input connected to a sample output of the poly-phase FIR interpolator; and a numerically controlled oscillator (NCO) having an output partitioned into: Nc integer bits connected to a control input of the FIR interpolator, and Nf fractional bits connected to a control input of the polynomial interpolator. The circuit may also include a reference clock for generating a reference clock signal. The NCO preferably further comprises a sample clock generator for generating a sample clock signal based on the reference clock signal, and the FIR interpolator further has a sample clock input for receiving the sample clock signal from the sample clock generator.

Abstract: A spread spectrum radio transceiver includes a high data rate baseband processor and a radio circuit connected thereto. The baseband processor preferably includes a modulator for spread spectrum phase shift keying (PSK) modulating information for transmission via the radio circuit. The modulator may include at least one modified Walsh code function encoder for encoding information according to a modified Walsh code for substantially reducing an average DC signal component to thereby enhance overall system performance when AC-coupling the received signal through at least one analog-to-digital converter to the demodulator. The demodulator is for spread spectrum PSK demodulating information received from the radio circuit. The modulator and demodulator are each preferably operable in one of a bi-phase PSK (BPSK) mode at a first data rate and a quadrature PSK (QPSK) mode at a second data rate. These formats may also be switched on-the-fly in the demodulator. Method aspects are also disclosed.