Abstract: A method of removal of a first and second sacrificial layer wherein an O2 plasma or an O2-containing environment is introduced to a cavity and a gap region through a plurality of via holes in a cavity capping material.

Abstract: A microelectromechanical system (MEMS) resonator or filter including a first conductive layer, one or more electrodes patterned in the first conductive layer which serve the function of signal input, signal output, or DC biasing, or some combination of these functions, an evacuated cavity, a resonating member comprised of a lower conductive layer and an upper structural layer, a first air gap between the resonating member and one or more of the electrodes, an upper membrane covering the cavity, and a second air gap between the resonating member and the upper membrane.

Abstract: A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material.

Abstract: A microelectromechanical system (MEMS) resonator or filter including a first conductive layer, one or more electrodes patterned in the first conductive layer which serve the function of signal input, signal output, or DC biasing, or some combination of these functions, an evacuated cavity, a resonating member comprised of a lower conductive layer and an upper structural layer, a first air gap between the resonating member and one or more of the electrodes, an upper membrane covering the cavity, and a second air gap between the resonating member and the upper membrane.

Abstract: A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material.

Abstract: A reflective spatial light modulator array is described incorporating liquid crystal devices, mirrors, a semiconductor substrate, electrical circuits, and a light blocking layer. The light blocking layer can be a reflector/absorber layer containing titanium. The light blocking layer can be a layer resulting in attenuation of incident light below a certain level at the semiconductor substrate. The invention overcomes the problem of shielding light from semiconductor devices, high optical throughput and contrast, pixel storage capacitance to hold the voltage across the liquid crystal device and precise control of the liquid crystal device thickness without spacers obscuring the mirrors.

Abstract: Aperture members are provided wherein there is thin 1–10 micrometer thick crystaline membrane that is surrounded by a frame of a bulk type crystalline material. The aperture being an opening through the membrane in a typical shape useful for device fabrication, such as a circle or pattern. The aperture member of the invention can be fabricated out of a typical silicon crystalline wafer in a process where doping in a region serves as an etch stop.

Abstract: Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process.

Abstract: Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process.

Abstract: Hybrid molds for molding a multiplicity of solder balls for use in a molten solder screening process and methods for preparing such molds are disclosed. A method for forming the multiplicity of cavities in a pyramidal shape by anisotropically etching a crystalline silicon substrate along a specific crystallographic plane is utilized to form a crystalline silicon face plate used in the present invention hybrid mold. In a preferred embodiment, a silicon face plate is bonded to a borosilicate glass backing plate by adhesive means in a method that ensures coplanarity is achieved between the top surfaces of the silicon face plate and the glass backing plate. In an alternate embodiment, an additional glass frame is used for bonding a silicon face plate to a glass backing plate, again with ensured coplanarity between the top surfaces of the silicon face plate and the glass frame. In a second alternate embodiment, a silicon face plate is encased in an extender material which may be borosilicate glass or a polymer.

Abstract: Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process.

Abstract: Aperture members are provided wherein there is thin 1-10 micrometer thick crystaline membrane that is surrounded by a frame of a bulk type crystalline material. The aperture being an opening through the membrane in a typical shape useful for device fabrication, such as a circle or pattern. The aperture member of the invention can be fabricated out of a typical silicon crystalline wafer in a process where doping in a region serves as an etch stop.

Abstract: Hybrid molds for molding a multiplicity of solder balls for use in a molten solder screening process and methods for preparing such molds are disclosed. A method for forming the multiplicity of cavities in a pyramidal shape by anisotropically etching a crystalline silicon substrate along a specific crystallographic plane is utilized to form a crystalline silicon face plate used in the present invention hybrid mold. In a preferred embodiment, a silicon face plate is bonded to a borosilicate glass backing plate by adhesive means in a method that ensures coplanarity is achieved between the top surfaces of the silicon face plate and the glass backing plate. In an alternate embodiment, an additional glass frame is used for bonding a silicon face plate to a glass backing plate, again with ensured coplanarity between the top surfaces of the silicon face plate and the glass frame. In a second alternate embodiment, a silicon face plate is encased in an extender material which may be borosilicate glass or a polymer.

Abstract: Method and apparatus for thermal management of an integrated circuit. A semiconductor device includes an integrated circuit and an integrated thermoelectric cooler formed on a common substrate. A semiconductor device is fabricated by forming an integrated circuit on a front side of the substrate and forming an integrated thermoelectric cooler on a back side of the substrate. A first thermal sink of semiconductor material capable of absorbing heat from the integrated circuit is formed on the back side of the substrate. N-type thermoelectric elements are formed on contacts formed on the first thermal sink. P-type thermoelectric elements are formed on contacts formed on a second thermal sink of semiconductor material capable of dissipating heat. The p-type and n-type thermoelectric elements are bonded to the contacts on the first and second thermal sinks, respectively, by a flip-chip soldering process.

Abstract: Reflective spatial light modulator array is described incorporating liquid crystal devices, mirrors, a semiconductor substrate, electrical circuits, and a reflector/absorber layer for blocking light. The invention overcomes the problem of shielding light from semiconductor devices, high optical throughput and contrast, pixel storage capacitance to hold the voltage across the liquid crystal device and precise control of the liquid crystal device thickness without spacers obscuring the mirrors.

Abstract: Hybrid molds for molding a multiplicity of solder balls for use in a molten solder screening process and methods for preparing such molds are disclosed. A method for forming the multiplicity of cavities in a pyramidal shape by anisotropically etching a crystalline silicon substrate along a specific crystallographic plane is utilized to form a crystalline silicon face plate used in the present invention hybrid mold. In a preferred embodiment, a silicon face plate is bonded to a borosilicate glass backing plate by adhesive means in a method that ensures coplanarity is achieved between the top surfaces of the silicon face plate and the glass backing plate. In an alternate embodiment, an additional glass frame is used for bonding a silicon face plate to a glass backing plate, again with ensured coplanarity between the top surfaces of the silicon face plate and the glass frame. In a second alternate embodiment, a silicon face plate is encased in an extender material which may be borosilicate glass or a polymer.

Abstract: A precise volume, precisely registerable carrier is provided for use with injection molding for producing integrated circuit bump contacts in the “flip chip” technology. A hemispherical cavity is produced by etching through and undercutting a registered opening into a transparent carrier. The hemispherical cavity has related specific volume and visible peripheral shape that permits simple optical quality control when the injection molding operation has filled the cavity and simple optical registration for fusing to the pads on the integrated circuit.

Abstract: A lithographically patterned three dimensional stencil type mask is formed on a substrate over a specific area that is to undergo processing. The three dimensional mask functionally provides an energy beam stencil at a precise height over the specific area. The stencil has surface properties that provide a resist function for any scattering of a focused particle beam that passes through an aperture or opening in the center of the stencil, and is formed using standard in the art additive and subtractive processes so that it can be removed after the particle beam processing. It has a particular advantage in an application where it is desired to have sub regions in a pixel area in a liquid crystal display that can provide different domains which operate to provide different pretilt states to the liquid crystal which in turn widens the viewing range of the display.

Abstract: A method for forming solder bumps on an electronic structure including the steps of first providing a mold made by a sheet of a mold material having a thickness greater than that of the solder bumps to be formed, the mold material has sufficient optical transparency so as to allow the inspection of a solder material subsequently filled into the mold cavities that are formed in the mold material, and a coefficient of thermal expansion that is substantially similar to the substrate which the mold will be mated to, forming a multiplicity of mold cavities in the sheet of mold material, filling the multiplicity of mold cavities with a solder material, cooling the mold to a temperature that is sufficient to solidify the solder material in the multiplicity of mold cavities, positioning the mold intimately with the electronic structure such that the cavities facing the structure, and heating the mold and the structure together to a temperature sufficiently high such that the solder material transfers onto the electro

Abstract: A method for forming solder bumps on an electronic structure including the steps of first providing a mold made by a sheet of a mold material having a thickness greater than that of the solder bumps to be formed, the mold material has sufficient optical transparency so as to allow the inspection of a solder material subsequently filled into the mold cavities that are formed in the mold material, and a coefficient of thermal expansion that is substantially similar to the substrate which the mold will be mated to, forming a multiplicity of mold cavities in the sheet of mold material, filling the multiplicity of mold cavities with a solder material, cooling the mold to a temperature that is sufficient to solidify the solder material in the multiplicity of mold cavities, positioning the mold intimately with the electronic structure such that the cavities facing the structure, and heating the mold and the structure together to a temperature sufficiently high such that the solder material transfers onto the electro