Abstract: An improved high frequency selective multimode/multiconfigurable data acqition and reduction processor (DARP) system for analyzing more than one high frequency multibit sample data word stream (SDWSM) input from a digital data source arrangement being evaluated. As the result of this analysis, one or more sample data words of any SDWSM are accepted, time-tagged and stored for further analysis in evaluating the arrangement. The DARP system is generally made up of a host computer (HC), a plurality of trigger elements (TEs) and an asynchronous time-tag generator. Each TE is generally comprised of a master control board, a plurality of three trigger boards and a TE memory. The DARP system is advantageously provided with a plurality of five primary modes for each TE as well as various secondary modes therefor.