Patents by Inventor James M. Frei

James M. Frei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230365278
    Abstract: A system for collecting debris includes a collector configured to accumulate debris and retain an electrostatic charge; a deployment mechanism configured to move the collector into a path of the debris; an electrostatic charging array comprising one or more wires or plates operatively connected to the collector; and one or more processors operatively coupled to the collector, the deployment mechanism, and the electrostatic charging array. The one or more processors are configured to track debris in relation to the collector; control movement of the collector and the deployment mechanism; and regulate power to the electrostatic charging array.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 16, 2023
    Inventors: Cole NIELSEN-COLE, James M. Frei
  • Patent number: 10429482
    Abstract: A method for characterization of fixture utilizes a mirror symmetric THRU structure and either a HALF-THRU with a LOAD shunted to ground or a THRU with a LOAD shunted to ground located at the mirror reference plane. The method extracts the short, open, and thru measurements from the THRU structure due to the mirror symmetry. The HALF-THRU with a LOAD or the THRU with a LOAD shunted to ground located at the mirror reference plane provides the independent measurement to fully characterize the fixture. The resultant impedance or scattering parameter HALF-THRU model may be used in de-embedding a Device-Under-Test, a calibration routine, or computational simulations. The parameters of a HALF-THRU model may be stored in a memory storage circuit affixed to the associated HALF-THRU fixture. Some embodiments may include at least one memory storage circuit that attaches to the HALF-THRU fixture body affixed to an interposing matable connector.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: October 1, 2019
    Assignee: Oracle International Corporation
    Inventors: James M. Frei, Jyotika Singh, Connie K. Szeto, Ryan Travis Caldwell, Kenneth F. Hatch
  • Publication number: 20150346310
    Abstract: A method for characterization of fixture utilizes a mirror symmetric THRU structure and either a HALF-THRU with a LOAD shunted to ground or a THRU with a LOAD shunted to ground located at the mirror reference plane. The method extracts the short, open, and thru measurements from the THRU structure due to the mirror symmetry. The HALF-THRU with a LOAD or the THRU with a LOAD shunted to ground located at the mirror reference plane provides the independent measurement to fully characterize the fixture. The resultant impedance or scattering parameter HALF-THRU model may be used in de-embedding a Device-Under-Test, a calibration routine, or computational simulations. The parameters of a HALF-THRU model may be stored in a memory storage circuit affixed to the associated HALF-THRU fixture. Some embodiments may include at least one memory storage circuit that attaches to the HALF-THRU fixture body affixed to an interposing matable connector.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: Oracle International Corpoaration
    Inventors: James M. Frei, Jyotika Singh, Connnie K. Szeto, Ryan Travis Caldwell, Kenneth F. Hatch
  • Patent number: 7979225
    Abstract: Method and system that test device sensitivity according to whether the device passes or fails when subjected to a test signal. The device may be repeatedly subjected to test signal at varying operating parameters in order to assess pass-fail threshold at which the device transitions from operating properly/improperly to operating improperly/properly.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: July 12, 2011
    Assignee: Oracle America, Inc.
    Inventors: Stephen A. Muller, Xiao-Ding Cai, Agustin Del Alamo, James M. Frei
  • Publication number: 20090312972
    Abstract: Method and system that test device sensitivity according to whether the device passes or fails when subjected to a test signal. The device may be repeatedly subjected to test signal at varying operating parameters in order to assess pass-fail threshold at which the device transitions from operating properly/improperly to operating improperly/properly.
    Type: Application
    Filed: June 17, 2008
    Publication date: December 17, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Stephen A. Muller, Xiao-Ding Cai, Agustin Del Alamo, James M. Frei
  • Patent number: 7627028
    Abstract: A method for making measurements using a vector network analyzer, and for multi-port S-parameter and T-parameter conversion includes a generalized T-matrix definition that facilitates the conversion between the S-parameters and the T-parameters for multi-port networks based on the well understood and mathematically simple 2-port relations. One contemplated approach generalizes all multi-port networks into two cases: balanced and unbalanced. Through careful selection of the T-matrix, the contemplated method extends 2-port symmetry to multi-port networks and provides an engineering implementable relationship between the S- and T-parameters for multi-port networks. This symmetry extension allows a practical means to cascade and de-embed such networks.
    Type: Grant
    Filed: October 18, 2008
    Date of Patent: December 1, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: James M. Frei, Xiao-Ding Cai, Stephen A. Muller