Patents by Inventor James M Higgins

James M Higgins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150370701
    Abstract: Systems, methods and/or devices are used to enable garbage collection of a sub-block of an individually erasable block of a storage medium in a storage device. In one aspect, the method includes determining a first trigger parameter in accordance with one or more operating conditions of a first sub-block of an erase block in the storage medium, and determining a second trigger parameter in accordance with one or more operating conditions of a second sub-block of the erase block in the storage medium. In accordance with a determination that the first trigger parameter meets a first vulnerability criterion, garbage collection of the first sub-block is enabled. Furthermore, in accordance with a determination that the second trigger parameter meets a second vulnerability criterion, garbage collection of the second sub-block is enabled.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: James M. Higgins, James Fitzpatrick, Mark Dancho
  • Publication number: 20150347229
    Abstract: A memory controller configures a plurality of word lines associated with a respective block of a 3D memory device in a first configuration, where the first configuration includes a set of configuration parameters for each word line of the plurality of word lines determined at least in part on the vertical positions of each word line relative to a substrate of the 3D memory device and, while the plurality of word lines are configured in the first configuration, writes data to and reads data from the respective block. For the respective block, the memory controller: adjusts a first parameter in the respective set of configuration parameters corresponding to a respective word line of the plurality of word lines in response to detecting a first trigger condition as to the respective word line and, after adjusting the first parameter, writes data to and reads data from the respective word line.
    Type: Application
    Filed: November 17, 2014
    Publication date: December 3, 2015
    Inventors: James M. Higgins, Robert W. Ellis, Neil R. Darragh, Aaron K. Olbrich, Navneeth Kankani, Steven Sprouse
  • Patent number: 9183137
    Abstract: A method of operation of a storage control system includes: calculating a throttle threshold; identifying a detection point based on the throttle threshold; and calculating a number of write/erase cycles based on the detection point and the throttle threshold for writing a memory device.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: November 10, 2015
    Assignee: SMART STORAGE SYSTEMS, INC.
    Inventors: Jacob Schmier, Mark Dancho, James M Higgins, Ryan Jones, Robert W Ellis
  • Publication number: 20150309752
    Abstract: The various embodiments described herein include methods and/or systems for throttling power in a storage device. In one aspect, a method of operation in a storage system includes obtaining a power metric corresponding to a count of active memory commands in the storage system, where active memory commands are commands being executed by the storage system. The method further includes, in accordance with a determination that the power metric satisfies one or more power thresholds, deferring execution of one or more pending memory commands.
    Type: Application
    Filed: December 16, 2014
    Publication date: October 29, 2015
    Inventors: Robert W. Ellis, James M Higgins, Mark Dancho, Ryan R. Jones
  • Publication number: 20150309751
    Abstract: A method of operation in a non-volatile memory system for deferring, in accordance with a determination to reduce power consumption by the non-volatile memory system, execution of commands in a command queue corresponding to a distinct set of non-volatile memory devices during a respective wait period. In some implementations, the respective wait period for a first distinct set of non-volatile memory devices in at least two distinct sets is at least partially non-overlapping with the respective wait period for a second distinct set of non-volatile memory devices in the at least two distinct sets.
    Type: Application
    Filed: December 16, 2014
    Publication date: October 29, 2015
    Inventors: Robert W. Ellis, James M. Higgins, Mark Dancho
  • Patent number: 9152555
    Abstract: A system and method of data management with modular erase in a data storage system with a memory array having an erase block and a target block with the target block in a logical unit separate from the erase block including: performing an erase operation on the erase block, the erase operation having an operation matrix configured for partial erasing of the erase block; updating a command status for the erase block; enabling an intervening command on the target block based on the command status indicating an incomplete erase status with the intervening command updating the command status; performing an erase optimization based on the command status; performing an additional erase operation based on the erase optimization; and updating the command status to an erase complete status based on the additional erase operation.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: October 6, 2015
    Assignee: SANDISK ENTERPRISE IP LLC.
    Inventors: James M. Higgins, Robert W. Ellis, Mark Dancho, James Fitzpatrick
  • Patent number: 9146850
    Abstract: A system and method of operation of a data storage system includes: a memory die for determining a middle read threshold; a control unit, coupled to the memory die, for calculating a lower read threshold and an upper read threshold based on the middle read threshold and a memory element age; and a memory interface, coupled to the memory die, for reading a memory page of the memory die using the lower read threshold, the middle read threshold, or the upper read threshold for compensating for a charge variation.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: September 29, 2015
    Assignee: SMART STORAGE SYSTEMS, INC.
    Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis
  • Patent number: 9093160
    Abstract: The embodiments described herein are used to execute staggered memory operations. The method includes, at each of a plurality of distinct memory portions of the storage device, establishing a non-zero command delay parameter distinct from a command delay parameter established for one or more of the other memory portions in the plurality of distinct memory portions. The method further includes, after establishing the non-zero command delay parameter in each of the plurality of distinct memory portions of the storage device, executing memory operations in two or more of the plurality of distinct memory portions of the storage device during overlapping time periods, the executing including, in each memory portion of the plurality of memory portions, delaying execution of a respective memory operation by an amount of time corresponding to the command delay parameter established for that memory portion.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: July 28, 2015
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventors: Robert W. Ellis, James M. Higgins, Vidyabhushan Mohan
  • Patent number: 9070481
    Abstract: A method of operation in a non-volatile memory device, including executing a memory operation with respect to a portion of a non-volatile memory device, and measuring a current corresponding to current drawn by at least the portion of the non-volatile memory device during the memory operation. An age metric is determined for at least the portion of the non-volatile memory device based on age criteria including a characteristic of the measured current. In accordance with a determination that the age metric satisfies one or more predefined threshold criteria, one or more configuration parameters associated with the non-volatile memory device are adjusted. After the adjusting, data is read from and data to the portion of the non-volatile memory device according to the one or more adjusted configuration parameters.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: June 30, 2015
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventors: Robert W. Ellis, James M. Higgins, Alexander Kwok-Tung Mak
  • Publication number: 20150143068
    Abstract: A system and method of data management with modular erase in a data storage system with a memory array having an erase block and a target block with the target block in a logical unit separate from the erase block including: performing an erase operation on the erase block, the erase operation having an operation matrix configured for partial erasing of the erase block; updating a command status for the erase block; enabling an intervening command on the target block based on the command status indicating an incomplete erase status with the intervening command updating the command status; performing an erase optimization based on the command status; performing an additional erase operation based on the erase optimization; and updating the command status to an erase complete status based on the additional erase operation.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: SanDisk Enterprise IP LLC
    Inventors: James M. Higgins, Robert W. Ellis, Mark Dancho, James Fitzpatrick
  • Publication number: 20150135033
    Abstract: A method of operation of a data storage system includes: monitoring a data interface bus, the monitoring by a non-volatile memory controller; activating a zero bit counter for detecting a ratio of 1's to 0's on the data interface bus; and adjusting a threshold voltage (Vth), based on the ratio of the 1's to the 0's from the zero bit counter, by the non-volatile memory controller.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 14, 2015
    Applicant: SanDisk Enterprise IP LLC
    Inventors: Robert W. Ellis, James M. Higgins, Mark Dancho
  • Publication number: 20150046665
    Abstract: Systems, methods and/or devices are used to enable a stale data mechanism. In one aspect, the method includes (1) receiving a write command specifying a logical address to which to write, (2) determining whether a stale flag corresponding to the logical address is set, (3) in accordance with a determination that the stale flag is not set, setting the stale flag and releasing the write command to be processed, and (4) in accordance with a determination that the stale flag is set, detecting an overlap, wherein the overlap indicates two or more outstanding write commands are operating on the same memory space.
    Type: Application
    Filed: July 15, 2014
    Publication date: February 12, 2015
    Inventors: James M. Higgins, Theron W. Virgin
  • Publication number: 20150043277
    Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.
    Type: Application
    Filed: July 17, 2014
    Publication date: February 12, 2015
    Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
  • Publication number: 20150046664
    Abstract: Systems, methods and/or devices are used to enable a settings adjustment mechanism. In one aspect, the method includes (1) accessing characterization information corresponding to how a group of non-volatile memory devices of a storage control system operates as the group wears, (2) determining an estimated age of a non-volatile memory device, of the group of non-volatile memory devices, in accordance with a wear indicator for the non-volatile memory device, and (3) determining one or more settings for the non-volatile memory device in accordance with the estimated age and the characterization information.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 12, 2015
    Inventors: James Fitzpatrick, Sheunghee Park, Bernardo Rub, James M. Higgins
  • Publication number: 20150046635
    Abstract: Systems, methods and/or devices are used to enable storage drive life estimation. In one aspect, the method includes (1) determining two or more age criteria of a storage drive, and (2) determining a drive age of the storage drive in accordance with the two or more age criteria of the storage drive.
    Type: Application
    Filed: July 17, 2014
    Publication date: February 12, 2015
    Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, James M. Kresse
  • Publication number: 20150039842
    Abstract: A system and method of operation of a data storage system includes: a memory die for determining a middle read threshold; a control unit, coupled to the memory die, for calculating a lower read threshold and an upper read threshold based on the middle read threshold and a memory element age; and a memory interface, coupled to the memory die, for reading a memory page of the memory die using the lower read threshold, the middle read threshold, or the upper read threshold for compensating for a charge variation.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: SMART Storage Systems, Inc.
    Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis
  • Patent number: 8891303
    Abstract: A memory controller configures a plurality of word lines associated with a respective block of a 3D memory device in a first configuration, where the first configuration includes a set of configuration parameters for each word line of the plurality of word lines determined at least in part on the vertical positions of each word line relative to a substrate of the 3D memory device and, while the plurality of word lines are configured in the first configuration, writes data to and reads data from the respective block. For the respective block, the memory controller: adjusts a first parameter in the respective set of configuration parameters corresponding to a respective word line of the plurality of word lines in response to detecting a first trigger condition as to the respective word line and, after adjusting the first parameter, writes data to and reads data from the respective word line.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: November 18, 2014
    Assignee: Sandisk Technologies Inc.
    Inventors: James M. Higgins, Robert W. Ellis, Neil R. Darragh, Aaron K. Olbrich, Navneeth Kankani, Steven Sprouse
  • Publication number: 20140310494
    Abstract: A storage control system, and a method of operation thereof, including: a recycle write queue for providing a recycle write; a host write queue for providing a host write; and a scheduler, coupled to the recycle write queue and the host write queue, for scheduling the recycle write and the host write for writing to a memory device.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 16, 2014
    Applicant: SMART Storage Systems, Inc.
    Inventors: James M. Higgins, James M. Kresse, Ryan Jones, Mark Dancho
  • Publication number: 20140310445
    Abstract: A storage control system, and a method of operation thereof, including: a power-down module for powering off a memory sub-system; a decay estimation module, coupled to the power-down module, for estimating a power-off decay rate upon the memory sub-system powered up, the power-off decay rate is for indicating how much data in the memory sub-system has decayed while the memory sub-system has been powered down; and a recycle module, coupled to the decay estimation module, for recycling an erase block for data retention based on the power-off decay rate.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 16, 2014
    Applicant: SMART Storage Systems, Inc.
    Inventors: James Fitzpatrick, James M. Higgins, Bernardo Rub, Ryan Jones, Robert W. Ellis, Mark Dancho, Sheunghee Park
  • Publication number: 20140244899
    Abstract: A method of operation of a storage control system includes: calculating a throttle threshold; identifying a detection point based on the throttle threshold; and calculating a number of write/erase cycles based on the detection point and the throttle threshold for writing a memory device.
    Type: Application
    Filed: February 27, 2013
    Publication date: August 28, 2014
    Applicant: SMART STORAGE SYSTEMS, INC.
    Inventors: Jacob Schmier, Mark Dancho, James M Higgins, Ryan Jones, Robert W Ellis