Patents by Inventor James M. Murduck
James M. Murduck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10910544Abstract: Superconducting circuits and memories that use a magnetic Josephson junction (MJJ) device as a pi inverter are disclosed. The MJJ device includes superconducting layers configured to allow a flow of a supercurrent through the MJJ device. The MJJ device further includes a magnetic layer arranged between the superconducting layers, where the magnetic layer has an associated magnetization direction, and where the first state of the MJJ device corresponds to a zero-phase of a supercurrent flowing through the MJJ device and the second state of the MJJ device corresponds to a ?-phase of the supercurrent flowing through the MJJ device. In response to an application of a magnetic field, without any change in the magnetization direction of the magnetic layer, the MJJ device is configured to switch from the first state to the second state responsive to a change in a phase of the supercurrent.Type: GrantFiled: February 26, 2019Date of Patent: February 2, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Thomas F. Ambrose, James M. Murduck
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Publication number: 20200274049Abstract: Superconducting circuits and memories that use a magnetic Josephson junction (MJJ) device as a pi inverter are disclosed. The MJJ device includes superconducting layers configured to allow a flow of a supercurrent through the MJJ device. The MJJ device further includes a magnetic layer arranged between the superconducting layers, where the magnetic layer has an associated magnetization direction, and where the first state of the MJJ device corresponds to a zero-phase of a supercurrent flowing through the MJJ device and the second state of the MJJ device corresponds to a ?-phase of the supercurrent flowing through the MJJ device. In response to an application of a magnetic field, without any change in the magnetization direction of the magnetic layer, the MJJ device is configured to switch from the first state to the second state responsive to a change in a phase of the supercurrent.Type: ApplicationFiled: February 26, 2019Publication date: August 27, 2020Inventors: Thomas F. Ambrose, James M. Murduck
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Patent number: 10546621Abstract: Magnetic Josephson junction driven flux-biased superconductor memory cell and methods are provided. A memory cell may include a magnetic Josephson junction (MJJ) superconducting quantum interference device (SQUID) comprising a first MJJ device and a second MJJ device, arranged in parallel to each other, where the MJJ SQUID is configured to generate a first flux-bias or a second flux-bias, where the first flux-bias corresponds to a first direction of current flow in the MJJ SQUID and the second flux-bias corresponds to a second direction of current flow in the MJJ SQUID. The memory cell may further include a superconducting metal-based superconducting quantum interference device (SQUID) including a first Josephson junction (JJ) and a second JJ, arranged in parallel to each other, where each of the first JJ and the second JJ has a critical current responsive to any flux-bias generated by the MJJ SQUID.Type: GrantFiled: June 20, 2018Date of Patent: January 28, 2020Assignee: Microsoft Technology Licensing, LLCInventors: James M. Murduck, Thomas F. Ambrose
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Publication number: 20190392878Abstract: Magnetic Josephson junction driven flux-biased superconductor memory cell and methods are provided. A memory cell may include a magnetic Josephson junction (MJJ) superconducting quantum interference device (SQUID) comprising a first MJJ device and a second MJJ device, arranged in parallel to each other, where the MJJ SQUID is configured to generate a first flux-bias or a second flux-bias, where the first flux-bias corresponds to a first direction of current flow in the MJJ SQUID and the second flux-bias corresponds to a second direction of current flow in the MJJ SQUID. The memory cell may further include a superconducting metal-based superconducting quantum interference device (SQUID) including a first Josephson junction (JJ) and a second JJ, arranged in parallel to each other, where each of the first JJ and the second JJ has a critical current responsive to any flux-bias generated by the MJJ SQUID.Type: ApplicationFiled: June 20, 2018Publication date: December 26, 2019Inventors: James M. Murduck, Thomas F. Ambrose
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Publication number: 20080296562Abstract: Methods and apparatus for fabricating carbon nanotubes (CNTs) and carbon nanotube devices. These include a method of fabricating self-aligned CNT field-effect transistors (FET), a method and apparatus of selectively etching metallic CNTs and a method and apparatus of fabricating an oxide in a carbon nanotube (CNT) device. These methods and apparatus overcome many of the disadvantages and limitations of the prior art.Type: ApplicationFiled: May 31, 2007Publication date: December 4, 2008Inventors: James M. Murduck, John Douglas Adam, James E. Baumgardner, Aaron A. Pesetski, Hong Zhang Pesetski, John Xavier Przybysz
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Patent number: 6335108Abstract: An implant patterned superconductive device and a method for indirect implant-patterning of oxide superconducting materials is provided. The method forms a device having an oxide superconducting layer on a substrate, deposits a passivation layer atop the oxide superconducting layer, and implants chemical impurities in a selected portion of the superconducting layer through the passivation layer. This modifies the conductivity of the selected portion of the oxide superconducting layer and electrically isolates the selected portion from the non-selected portion of the oxide superconducting layer. The passivation layer is made of a material less susceptible to implant damage than the oxide superconducting layer to allow inhibition of the oxide superconducting layer while protecting the crystalline structure of the top surface of the oxide superconducting layer and keeping it planarized.Type: GrantFiled: September 7, 2000Date of Patent: January 1, 2002Assignee: TRW Inc.Inventors: John R. LaGraff, Claire L. Pettiette-Hall, James M. Murduck, Hugo W-K. Chan
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Patent number: 6188919Abstract: A SNS Josephson junction (10) is provided for use in a superconducting integrated circuit. The SNS junction (10) includes a first high temperature superconducting (HTS) layer (14) deposited and patterned on a substrate (18), such that the first HTS layer (14) is selectively removed to expose a top surface of the substrate (18) as well as to form an angular side surface (22) on the first HTS layer (14) adjacent to the exposed top surface of the substrate (18). Ion implantation is used to form a junction region (12) having non-superconducting properties along the angular side surface (22) of the first HTS layer (14). A second HTS layer (16) is then deposited and patterned over at least a portion of the first HTS layer (14) and the exposed top surface of the substrate (18), thereby forming a SNS Josephson junction.Type: GrantFiled: May 19, 1999Date of Patent: February 13, 2001Assignee: TRW Inc.Inventors: John R. LaGraff, James M. Murduck, Hugo W-K. Chan
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Patent number: 6147032Abstract: An implant patterned superconductive device and a method for indirect implant-patterning of oxide superconducting materials is provided. The method forms a device having an oxide superconducting layer on a substrate, deposits a passivation layer atop the oxide superconducting layer, and implants chemical impurities in a selected portion of the superconducting layer through the passivation layer. This modifies the conductivity of the selected portion of the oxide superconducting layer and electrically isolates the selected portion from the non-selected portion of the oxide superconducting layer. The passivation layer is made of a material less susceptible to implant damage than the oxide superconducting layer to allow inhibition of the oxide superconducting layer while protecting the crystalline structure of the top surface of the oxide superconducting layer and keeping it planarized.Type: GrantFiled: May 19, 1999Date of Patent: November 14, 2000Assignee: TRW Inc.Inventors: John R. LaGraff, Claire L. Pettiette-Hall, James M. Murduck, Hugo W-K. Chan
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Patent number: 6055723Abstract: The invention relates to a method for producing an electrical connection to a high temperature superconductor (HTS) circuit, where a polymer material is applied to the HTS surface covering the circuit contact disposed on one surface of the HTS circuit, a via is created in the polymer material exposing the circuit contact, a diffusion barrier is applied into the via covering the circuit contact; and, a solder bump is applied to the diffusion barrier.Type: GrantFiled: June 1, 1998Date of Patent: May 2, 2000Assignee: TRW Inc.Inventors: Gershon Akerling, James M. Murduck
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Patent number: 5863868Abstract: A SQUID 10 was multiple junctions, each junction allowing a critical current to flow therethrough. The SQUID 10 comprises a laminar structure including: (a) a substantially planar substrate 12; (b) a first high temperature superconductive layer 14 of substantially uniform thickness deposited on the substrates; (c) a dielectric layer 16 deposited on the first superconductive layer 14, the dielectric layer 16 comprising a planar level segment 18 having two ramp segments defining SQUID junctions at opposing ends 20 and defining SQUID hole; and (d) a second high temperature superconductive layer 24 of substantially uniform thickness deposited on the dielectric layer 16, the second high temperature superconductive layer 24 covering all three segments of the dielectric layer 16.Type: GrantFiled: September 25, 1997Date of Patent: January 26, 1999Assignee: TRW Inc.Inventors: Hugo Wai-Kung Chan, Kenneth P. Daly, James M. Murduck
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Patent number: 5286336Abstract: A Josephson junction and a method for its fabrication in which a laminated junction layer is formed in situ on the side edge of a base electrode contact. The laminated junction layer forms the Josephson junction of the present invention and includes an insulating or barrier layer sandwiched between a superconducting base electrode and a superconducting counter electrode. The Josephson junction is formed on the side edge of the base electrode contact to allow very small junction areas to be fabricated using conventional optical lithographic techniques, such as photolithography. The laminated junction layer is formed in situ, with the three layers of the laminated junction layer being formed successively without removing the device from the controlled atmosphere of the deposition system, to prevent contamination of the junction region.Type: GrantFiled: November 2, 1992Date of Patent: February 15, 1994Assignee: TRW Inc.Inventors: Hugo W. Chan, Arnold H. Silver, Robert D. Sandell, James M. Murduck
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Patent number: 4844989Abstract: A superconducting structure is formed by depositing alternate layers of aluminum nitride and niobium nitride on a substrate. Deposition methods include dc magnetron reactive sputtering, rf magnetron reactive sputtering, thin-film diffusion, chemical vapor deposition, and ion-beam deposition. Structures have been built with layers of niobium nitride and aluminum nitride having thicknesses in a range of 20 to 350 Angstroms. Best results have been achieved with films of niobium nitride deposited to a thickness of approximately 70 Angstroms and aluminum nitride deposited to a thickness of approximately 20 Angstroms. Such films of niobium nitride separated by a single layer of aluminum nitride are useful in forming Josephson junctions. Structures of 30 or more alternating layers of niobium nitride and aluminum nitride are useful when deposited on fixed substrates or flexible strips to form bulk superconductors for carrying electric current. They are also adaptable as voltage-controlled microwave energy sources.Type: GrantFiled: March 19, 1987Date of Patent: July 4, 1989Assignee: The University of Chicago (Arch Development Corp.)Inventors: James M. Murduck, Yves J. Lepetre, Ivan K. Schuller, John B. Ketterson