Patents by Inventor James M. Pexa

James M. Pexa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5159551
    Abstract: An imaging system acquires imaged data from a non-invasive examination of the subject. The data is transferred among various image processing agents on a data bus. A data acquisition agent receives the image data from the non-invasive examination and generates subsequent agent locations and transmits the subsequent agent locations and the packets of image data along the data bus. Various image processing agents each receive packets of data transmitted with that agent's location and performs imaging and processing operations on the data packets generating another agent location and thereafter transmitting the other agent location and process data packets along the data bus. The display agent receives the processed image data packets from one of the image processing agents via the data bus, stores the processed image data packets and communicates the process image data to a man-readable image display.
    Type: Grant
    Filed: August 9, 1989
    Date of Patent: October 27, 1992
    Assignee: Picker International, Inc.
    Inventors: Carl J. Brunnett, Beverly M. Gocal, Michael M. Kerber, James M. Pexa, Chris J. Vrettos
  • Patent number: 4975843
    Abstract: An array processor has been designed in a highly paralleled fashion thereby allowing extremely fast movement of data. Two 32-bit words come out of an internal data memory device. This data is fed into a register file. On the same clock cycle, three 32-bit results are coming out of an arithmetic unit. Those results feed back into the register file. Therefore, on a single clock cycle, five separate pieces of data are going into the register file. In the same clock cycle, other data coming out of the outputs of the register file feed data into two separate floating arithmetic adders and one floating arithmetic multiplier. The design of the present embodiment allows a constant flow of data to be supplied to the arithmetic unit thereby using the arithmetic unit to its maximum functioning ability.
    Type: Grant
    Filed: November 25, 1988
    Date of Patent: December 4, 1990
    Assignee: Picker International, Inc.
    Inventors: Carl J. Brunnett, Beverly M. Gocal, Paul J. Hyland, Michael M. Kerber, James M. Pexa, John Sidoti, Chris J. Vrettos