Abstract: An arrangement for establishing communication paths through a plurality of serially connected thyristors comprising a first and last thyristor, is disclosed. Each thyristor comprises a main conduction path terminating in a first and second main conduction electrode and a control path between the first electrode and a gate electrode. The second main conduction electrode of each thyristor, except the last, is connected to the first main conduction electrode of a subsequent thyristor. To establish a path, a marking potential is applied to the first main conduction electrode of the first thyristor and gate currents, equal to or greater than the thyristor holding currents, are produced in the control paths of the thyristors in sequence and overlapped in time from the first to the last. A hold current is then produced in the second main conduction electrode of the last thyristor and the gate currents are terminated.