Abstract: Memory modules and sockets are disclosed. An example memory module comprises a circuit board, a first row of connection pins disposed along an edge of the circuit board, and a second row of pins disposed adjacent to the first row of pins and further from the edge than the first row of pins.

Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to facilitating increased clock speeds on a substrate by lowering the impedance of traces that provide clock signals to components such as DRAM. For example, embodiments may include a substrate with a first layer and a second layer parallel to the first layer with a first trace coupled with the first layer in a routing configuration and a second trace coupled with the second layer in the routing configuration, where the routing configuration of the first trace and the second trace substantially overlap each other with respect to an axis perpendicular to the first layer and the second layer, and where the first trace and the second trace are electrically coupled by a first and a second electrical coupling perpendicular to the first layer and the second layer.

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, the electronic package comprises a package substrate, that comprises a bumpout region on a first surface of the package substrate, and a pin region on a second surface of the package substrate. In an embodiment, a data path from the bumpout region to the pin region is included in the electronic package. In an embodiment, a ground path brackets the data path from the bumpout region to the pin region.

Abstract: Systems, apparatuses and methods may provide for a memory module that includes a dynamic random access memory (DRAM), a first plurality of contact pads positioned along a first side of the DRAM, a first plurality of L-shaped contacts, wherein each of the first plurality of L-shaped contacts is soldered to one of the first plurality of contact pads, a second plurality of contact pads positioned along a second side of the DRAM, and a second plurality of L-shaped contacts, wherein each of the second plurality of L-shaped contacts is soldered to one of the second plurality of contact pads.

Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to facilitating increased clock speeds on a substrate by lowering the impedance of traces that provide clock signals to components such as DRAM. For example, embodiments may include a substrate with a first layer and a second layer parallel to the first layer with a first trace coupled with the first layer in a routing configuration and a second trace coupled with the second layer in the routing configuration, where the routing configuration of the first trace and the second trace substantially overlap each other with respect to an axis perpendicular to the first layer and the second layer, and where the first trace and the second trace are electrically coupled by a first and a second electrical coupling perpendicular to the first layer and the second layer.

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, the electronic package comprises a package substrate, that comprises a bumpout region on a first surface of the package substrate, and a pin region on a second surface of the package substrate. In an embodiment, a data path from the bumpout region to the pin region is included in the electronic package. In an embodiment, a ground path brackets the data path from the bumpout region to the pin region.

Abstract: Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.

Abstract: Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.

Abstract: A dual-sensory eyewear device for providing visual and aural distractions. The dual-sensory eyewear device includes a frame to which a pair of voltage controlled liquid crystal display lenses and audio devices may be connected. An electronics system and a power system are also included and are housed within the frame. The power system provides electrical current while the electronics package dictates operation of the lenses and the audio devices. Display drivers of the electronics package allow the pair of lenses to switch between an opaque and transparent state, while an audio amplifier operates the pair of speakers. Operation commands to dictate use of the pair of lenses and the pair of speakers can be remotely transmitted to the electronics package through a wireless communication module and interpreted through a signal decoder.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining data describing one or more customer contacts of a user from a third-party content provider; matching the one or more customer contacts to respective additional third-party content associated with the one or more customer contacts; deriving geographic location information for one or more of the customer contacts based on the additional third-party content; receiving a geographic location of the user; determining one or more contact opportunities based on the geographic location of the user, the geographic location information for the one or more customer contacts, and one or more presentation criteria; and providing data describing the one or more contact opportunities to a user device for presentation, wherein the data is presented on a user interface of the user device.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving a user login request originating from a user device, the user login request including a user identifier; authenticating, based on the user identifier, the user as having access to information associated with a particular tenant of a plurality of tenants; identifying a tenant specified theme associated with the particular tenant of a plurality of tenant themes, the theme being specified by the tenant for use in presenting data to authenticated users; obtaining data associated with the particular tenant; and providing the data associated with the particular tenant to the user device for presentation, wherein the data is presented on a user interface of the user device, the data being formatted based on the identified tenant theme.

Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.

Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.

Abstract: A circuit board is described where the fiberglass fiber pattern as been modified than what is found in conventional FR4 circuit boards. In one embodiment, the sets of fiberglass fibers are disposed in a zig-zag or herringbone manner. In one use, when a pair of conductors are disposed onto or into the board, the material surrounding a first conductor tends to be similar to the material surrounding a second conductor. Doing so may reduce differential to common mode conversion between the conductors.

Abstract: An embodiment may comprise a counter to provide a count value, enable logic coupled with the counter, and circuitry coupled with the enable logic, the circuitry to be powered up or down if the counter value is outside of a resonance bandwidth for the circuitry to be powered up or down. An embodiment may comprise a method of initializing a counter while circuitry is placed in a standby mode, reading the counter, and powering up the circuitry if the counter does not indicate a resonance bandwidth. An embodiment may be a system comprising a device including a power delivery network to deliver power, a link coupled with the device, the link to electrically communicate with the device, and control circuitry coupled with the link, the control circuitry to limit the link from powering up or down at a resonant frequency of the power delivery network.

Abstract: A method, system and apparatus to distribute a clock signal among a plurality of memory units in a memory architecture. A buffer chip is coupled to a plurality of memory units each by a point to point link. The buffer chip includes a clock generator to generate a continuous free running clock that may be passed serially through a subset of memory units in the architecture. Sending of data is delayed over the point to point links based on proximity of the memory units to the buffer chip to accommodate delay in the multidrop clock signal.

Abstract: A method and system for a configurable Vcc reference and Vss reference differential current mode transmitter is described. The system includes a Vss reference differential current mode driver, a Vcc reference differential current mode driver coupled to the Vss reference current mode driver, and a controller circuit coupled to the Vss reference differential current mode driver and the Vcc reference differential current mode driver to select between the Vss reference differential current mode driver and the Vcc reference differential current mode driver based on a type of transmission interface.

Abstract: According to some embodiments, data is transmitted from a host to a first memory unit in a group of memory units. The data may then be repeated from the first memory unit to another memory unit in the group.

Abstract: A method includes detecting a change in temperature in an integrated circuit that is coupled to a differential communication link, and responding to the detected change in temperature by initiating a retraining process for the differential communication link.

Abstract: In some embodiments, a chip includes transmitters and receivers, and control circuitry. The control circuitry to cause some of the transmitters and receivers to be inoperative in response to an estimated activity level being in a first range, while others of the transmitters and receivers remain operative. Other embodiments are described and/or claimed.