Abstract: A gear shift assembly for selecting a gear in a vehicle transmission that includes a multipiece clamping assembly for connecting the driver's gear selector lever. The clamping assembly has separate saddle and clamp components that are fastened together to encircle the selector lever and position the selector lever in the gear shift assembly.

Abstract: A gear shift assembly for selecting a gear in a vehicle transmission that includes a multipiece clamping assembly for connecting the driver's gear selector lever. The clamping assembly has separate saddle and clamp components that are fastened together to encircle the selector lever and position the selector lever in the gear shift assembly.

Abstract: A wafer includes a silicon layer, a first dielectric layer on the silicon layer, and a ferroelectric layer on the first dielectric layer. The ferroelectric layer defines one or more gaps between portions of the ferroelectric layer. The wafer also includes a second dielectric layer on the ferroelectric layer and disposed within the one or more gaps.

Abstract: In some embodiments method comprises depositing a ferroelectric layer on a top surface of a semiconductor wafer and forming one or more gaps in the ferroelectric layer. The one or more gaps can be formed on a repetitive spacing to relieve stresses between the ferroelectric layer and the semiconductor wafer. A first dielectric layer is deposited over the ferroelectric layer and the first dielectric layer is planarized to fill in the gaps. A second dielectric layer is formed between the ferroelectric layer and the semiconductor wafer. The second dielectric layer can be formed by annealing the wafer in an oxidizing atmosphere such that an upper portion of the semiconductor substrate forms an oxide layer between the semiconductor substrate and the ferroelectric layer.

Abstract: In some embodiments method comprises depositing a ferroelectric layer on a top surface of a semiconductor wafer and forming one or more gaps in the ferroelectric layer. The one or more gaps can be formed on a repetitive spacing to relieve stresses between the ferroelectric layer and the semiconductor wafer. A first dielectric layer is deposited over the ferroelectric layer and the first dielectric layer is planarized to fill in the gaps. A second dielectric layer is formed between the ferroelectric layer and the semiconductor wafer. The second dielectric layer can be formed by annealing the wafer in an oxidizing atmosphere such that an upper portion of the semiconductor substrate forms an oxide layer between the semiconductor substrate and the ferroelectric layer.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to via and skip via structures and methods of manufacture. The method includes: forming a first metallization layer with a first capping layer over the first metallization layer; forming a second metallization layer with a second capping layer over the second metallization layer; forming a partial skip via structure to the first metallization layer by removing a portion of the first capping layer and the second capping and depositing conductive material in an opening formed in the second metallization layer; forming a third capping layer over the filled partial skip via and the second capping layer; and forming a remaining portion of a skip via structure in alignment with the partial skip via structure by opening the third capping layer to expose the conductive material of the partial skip via.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to dielectric repair for via and skip via structures and methods of manufacture. The method includes: etching a via structure in a dielectric layer; repairing sidewalls of the via structure with a repair agent; and extending the via structure with an additional etching into a lower dielectric layer to form a skip via structure exposing a metallization layer.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to dielectric repair for via and skip via structures and methods of manufacture. The method includes: etching a via structure in a dielectric layer; repairing sidewalls of the via structure with a repair agent; and extending the via structure with an additional etching into a lower dielectric layer to form a skip via structure exposing a metallization layer.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to via and skip via structures and methods of manufacture. The method includes: forming a first metallization layer with a first capping layer over the first metallization layer; forming a second metallization layer with a second capping layer over the second metallization layer; forming a partial skip via structure to the first metallization layer by removing a portion of the first capping layer and the second capping and depositing conductive material in an opening formed in the second metallization layer; forming a third capping layer over the filled partial skip via and the second capping layer; and forming a remaining portion of a skip via structure in alignment with the partial skip via structure by opening the third capping layer to expose the conductive material of the partial skip via.

Abstract: Electronic Design Automation software displays parameters of a component in a graphical user interface. According to an embodiment, parameters of a component may be filtered through the use of a query. A Component Parameter Manager may search through parameter fields in a CDF file for components that match the query and emphasize the matching parameters in a graphical user interface. The parameter fields in a CDF file may also be augmented by a separate file to add search instructions or additional parameter fields. The augmentation helps facilitate a search by the Component Parameter Manager. The augmentations to a CDF file may be provided in a editable file separate from the CDF file.

Abstract: The present disclosure generally relates to a tightening apparatus, a wristband having the same, and a wristwatch having the same. In one embodiment, a plurality of pieces are coupled together and to a housing, and have one or more wires running through at least a first piece and a second piece of the plurality of pieces. The first and second pieces of the plurality of pieces are spaced a distance apart. The housing partially encloses at least a ratchet having a center axis, and a spool coupled to the ratchet, the spool being rotatable about an axis that is collinear with the center axis. The one or more wires are coupled to the spool, and are configured to wind around the spool when the spool rotates. As the spool rotates, the distance between at least the first and second pieces of the plurality of pieces is reduced.

Abstract: Method and system for verifying data in a database. In one aspect, verifying data includes receiving an indication of at least one policy, the at least one policy including at least one rule. A verification process is initiated on target data by implementing the at least one policy, where implementing the at least one policy includes instantiating and applying the at least one rule. The at least one rule causes at least one verification check to be performed on the target data.

Abstract: The invention pertains to a digital camera system and related software which is capable of identifying the presence or absence of known tools and/or objects in previously identified storage locations as well as the presence of non-conforming objects.

Abstract: In one embodiment, the invention comprises a MOSFET comprising individual MOSFET cells. Each cell comprises a U-shaped well (228) (P type) and two parallel sources (260) (N type) formed within the well. A plurality of source rungs (262) (doped N) connect sources (260) at multiple locations. Regions between two rungs (262) comprise a body (252) (P type). These features are formed on an N-type epitaxial layer (220), which is formed on an N-type substrate (216). A contact (290) extends across and contacts a plurality of source rungs (262) and bodies (252). Gate oxide and a gate contact overlie a leg of a first well and a leg of a second adjacent well, inverting the conductivity responsive to a gate voltage. A MOSFET comprises a plurality of these cells to attain a desired low channel resistance. The cell regions are formed using self-alignment techniques at several states of the fabrication process.

Abstract: In one embodiment, the invention comprises a MOSFET comprising individual MOSFET cells. Each cell comprises a U-shaped well (228) (P type) and two parallel sources (260) (N type) formed within the well. A plurality of source rungs (262) (doped N) connect sources (260) at multiple locations. Regions between two rungs (262) comprise a body (252) (P type). These features are formed on an N-type epitaxial layer (220), which is formed on an N-type substrate (216). A contact (290) extends across and contacts a plurality of source rungs (262) and bodies (252). Gate oxide and a gate contact overlie a leg of a first well and a leg of a second adjacent well, inverting the conductivity responsive to a gate voltage. A MOSFET comprises a plurality of these cells to attain a desired low channel resistance. The cell regions are formed using self-alignment techniques at several states of the fabrication process.

Abstract: A system and method are disclosed for the treatment of liquid runoff, such as rainfall, irrigation, and waste or produced water, utilizing aboveground, modular, permeable barriers containing reactive media that can immobilize particular solutes of concern, removing them from the liquid runoff. The modular design allows construction of a relatively-uniform barrier, or media volume, that is self-supporting and easily assembled, maintained, modified, and augmented. A permeable reactive barrier constructed according to the present invention provides significant contact between the reactive media and the solutes of concern while allowing the runoff stream to flow through the structure relatively unimpeded.

Abstract: Modular assembly equipment including portable machinery for performing the assembly and a controlling device for controlling the portable machinery is disclosed.

Abstract: The invention relates to reactor systems and processes for producing synthesis gas. In one embodiment, a reactor comprises a first reaction zone comprising a combustion catalyst, wherein the first reaction zone is operated at conditions sufficient to produce a combustion zone product comprising heat generated by the combustion of a fuel. The reactor further comprises a second reaction zone comprising a partial oxidation catalyst, wherein the second reaction zone is adapted to receive the combustion zone product and a reaction feed comprising a hydrocarbon gas. The second reaction zone is operated at conditions sufficient for partially oxidizing the hydrocarbon gas to a product stream comprising synthesis gas. The heat of combustion is transferred directly to the reaction feed by mixing it in a feed mix region located in the reactor between the first and second reaction zones, in such a manner that the reaction feed does not need preheating prior to entering the partial oxidation zone.

Abstract: A method for the treatment of liquid runoff, such as rainfall or irrigation runoff, to prevent the transportation of solutes. The method comprises permeable reactive barriers constructed to be permeable to rainfall runoff streams, and to effectively contact the stream with the contained media to facilitate removal of solutes from the runoff stream. Said method of rainfall runoff treatment is easily deployed in a variety of settings and easily maintained over long periods of time.