Abstract: Photo-masks for fabricating surface-relief grating diffractive devices and methods of fabricating surface-relief grating diffractive devices are described. The photo-mask can include refractive elements and/or diffractive elements contained in or on a body element. The photo-mask can be used to simultaneously produce multiple surface-relief grating diffractive devices in a recording material. The photo-mask enables the surface-relief grating diffractive devices to be produced in large quantities while significantly reducing the cost and labor required.

Abstract: Various embodiments of an optimized microchip and methods of fabricating and operating the same are provided. One microchip embodiment, among others, comprises a repeater-type transistor located in a first path corresponding to a first path type, the repeater-type transistor having a parameter at a first design value, and a logic-type transistor located in the first path or a different path, each of the paths corresponding to the first path type, the logic-type transistor having the parameter at a second design value.

Abstract: Devices having one or more of the following: an input/output (I/O) interconnect system, an optical I/O interconnect, an electrical I/O interconnect, a radio frequency I/O interconnect, are disclosed. A representative I/O interconnect system includes a first substrate and a second substrate. The first substrate includes a compliant pillar vertically extending from the first substrate. The compliant pillar is constructed a first material. The second substrate includes a compliant socket adapted to receive the compliant pillar. The compliant socket is constructed of a second material.

Abstract: Probe modules, methods of use of probe modules, and methods of preparing probe modules, are disclosed.

Abstract: Input/output (I/O) interconnects, fluidic I/O interconnects, electrical, optical, and fluidic I/O interconnects, devices incorporating the I/O interconnects, systems incorporating the I/O interconnects, and methods of fabricating the I/O interconnects, devices, and systems, are described herein.

Abstract: Systems and methods for three dimensional lithography, nano-indentation, and combinations thereof are disclosed.

Abstract: Devices and method of fabrication thereof are disclosed. A representative device includes one or more lead packages. The lead packages include a substrate including a plurality of die pads, an overcoat polymer layer, a plurality of sacrificial polymer layers disposed between the substrate and the overcoat polymer layer, and a plurality of leads. Each lead is disposed upon the overcoat polymer layer having a first portion disposed upon a die pad. The sacrificial polymer layer can be removed to form one or more air-gaps.

Abstract: Devices and method of fabrication thereof are disclosed. A representative device includes one or more lead packages. The lead packages include a substrate including a plurality of die pads, an overcoat polymer layer, a plurality of sacrificial polymer layers disposed between the substrate and the overcoat polymer layer, and a plurality of leads. Each lead is disposed upon the overcoat polymer layer having a first portion disposed upon a die pad. The sacrificial polymer layer can be removed to form one or more air-gaps.