Patents by Inventor James Montague Cleeves
James Montague Cleeves has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8372194Abstract: Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA atom source and a dopant source. By irradiating a doped liquid silane during at least part of its deposition, a thin, substantially uniform doped oligomerized/polymerized silane film may be formed on a substrate. Such irradiation is believed to convert the doped silane film into a relatively high-molecular weight species with relatively high viscosity and relatively low volatility, typically by cross-linking, isomerization, oligomerization and/or polymerization. A film formed by the irradiation of doped liquid silanes can later be converted (generally by heating and annealing/recrystallization) into a doped, hydrogenated, amorphous silicon film or a doped, at least partially polycrystalline silicon film suitable for electronic devices.Type: GrantFiled: January 25, 2008Date of Patent: February 12, 2013Assignee: Kovio, Inc.Inventors: Fabio Zürcher, Wenzhuo Guo, Joerg Rockenberger, Vladimir K. Dioumaev, Brent Ridley, Klaus Kunze, James Montague Cleeves
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Publication number: 20120307569Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.Type: ApplicationFiled: August 14, 2012Publication date: December 6, 2012Inventors: Arvind KAMATH, Patrick Smith, James Montague Cleeves
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Patent number: 8304780Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.Type: GrantFiled: June 9, 2010Date of Patent: November 6, 2012Assignee: Kovio, Inc.Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
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Patent number: 8296943Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.Type: GrantFiled: May 15, 2009Date of Patent: October 30, 2012Assignee: Kovio, Inc.Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
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Patent number: 8264027Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.Type: GrantFiled: March 12, 2010Date of Patent: September 11, 2012Assignee: Kovio, Inc.Inventors: Arvind Kamath, Patrick Smith, James Montague Cleeves
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Patent number: 8264359Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.Type: GrantFiled: October 10, 2008Date of Patent: September 11, 2012Assignee: Kovio, Inc.Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
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Patent number: 8227320Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.Type: GrantFiled: October 10, 2008Date of Patent: July 24, 2012Assignee: Kovio, Inc.Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
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Publication number: 20120181636Abstract: Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects. A metal ink may be printed for contacts as well as for local interconnects at the same time, or in the alternative, the printed metal can act as a seed for electroless deposition of other metals if different metals are desired for the contact and the interconnect lines. This approach advantageously reduces the number of processing steps and does not necessarily require any etching.Type: ApplicationFiled: March 22, 2012Publication date: July 19, 2012Inventors: Aditi Chandra, Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Mao Takashima, Erik Scher
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Patent number: 8211396Abstract: Heterocyclosilane compounds and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous silicon film (that may also be hydrogenated to some extent) or doped polycrystalline semiconductor film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a “doped liquid silicon” composition.Type: GrantFiled: September 24, 2004Date of Patent: July 3, 2012Assignee: Kovio, Inc.Inventors: Wenzhuo Guo, Fabio Zürcher, Joerg Rockenberger, Klaus Kunze, Vladimir K. Dioumaev, Brent Ridley, James Montague Cleeves
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Patent number: 8164423Abstract: A RF MOS- or nonlinear device-based surveillance and/or identification tag, and methods for its manufacture and use. The tag generally includes (a) an inductor, (b) a first capacitor plate coupled to the inductor, (c) a dielectric film on the first capacitor plate, (d) a semiconductor component on the dielectric film, and (e) a conductor that provides electrical communication between the semiconductor component and the inductor. The method of manufacture generally includes (1) depositing a semiconductor material (or precursor) on a dielectric film; (2) forming a semiconductor component from the semiconductor material/precursor; (3) forming a conductive structure at least partly on the semiconductor component; and (4) etching the electrically functional substrate to form (i) an inductor and/or (ii) a second capacitor plate.Type: GrantFiled: April 15, 2008Date of Patent: April 24, 2012Assignee: Kovio, Inc.Inventors: J. Devin MacKenzie, James Montague Cleeves, Vik Pavate, Christopher Gudeman, Fabio Zurcher, Max Davis, Dan Good, Joerg Rockenberger
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Patent number: 8158518Abstract: Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal onto an exposed silicon surface, drying the ink to form a silicide-forming metal precursor, and heating the silicide-forming metal precursor and the silicon surface to form a metal silicide contact. Optionally, the metal precursor ink may be selectively deposited onto a dielectric layer adjacent to the exposed silicon surface to form a metal-containing interconnect. Furthermore, one or more bulk conductive metal(s) may be deposited on remaining metal precursor ink and/or the dielectric layer. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects.Type: GrantFiled: July 17, 2008Date of Patent: April 17, 2012Assignee: Kovio, Inc.Inventors: Aditi Chandra, Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Mao Takashima, Erik Scher
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Patent number: 8138921Abstract: A method for reliable deactivation of a security (EAS) tag, and an apparatus for accomplishing the same. The method generally includes placing a security tag a first distance from a deactivation apparatus; determining whether a deactivation confirmation signal has occurred; and when it is determined that the deactivation confirmation signal did not occur, placing the security tag closer to the deactivation apparatus.Type: GrantFiled: August 8, 2008Date of Patent: March 20, 2012Assignee: Kovio, Inc.Inventors: James Montague Cleeves, Vivek Subramanian
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Publication number: 20110178321Abstract: Dopant-group substituted (cyclo)silane compounds, liquid-phase compositions containing such compounds, and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous or polycrystalline silicon film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a doped “liquid silicon” composition.Type: ApplicationFiled: January 18, 2010Publication date: July 21, 2011Inventors: Wenzhuo GUO, Vladimir K. Dioumaev, Brent Ridley, Fabio Zürcher, Joerg Rockenberger, James Montague Cleeves
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Patent number: 7981482Abstract: Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA atom source and a dopant source. By irradiating a doped liquid silane during at least part of its deposition, a thin, substantially uniform doped oligomerized/polymerized silane film may be formed on a substrate. Such irradiation is believed to convert the doped silane film into a relatively high-molecular weight species with relatively high viscosity and relatively low volatility, typically by cross-linking, isomerization, oligomerization and/or polymerization. A film formed by the irradiation of doped liquid silanes can later be converted (generally by heating and annealing/recrystallization) into a doped, hydrogenated, amorphous silicon film or a doped, at least partially polycrystalline silicon film suitable for electronic devices.Type: GrantFiled: June 19, 2006Date of Patent: July 19, 2011Assignee: Kovio, Inc.Inventors: Fabio Zürcher, Wenzhuo Guo, Joerg Rockenberger, Vladimir K. Dioumaev, Brent Ridley, Klaus Kunze, James Montague Cleeves
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Patent number: 7956425Abstract: Thin film transistors (TFT) and methods for making same. The TFTs generally comprise: (a) a semiconductor layer comprising source and drain terminals and a channel region therebetween; (b) a gate electrode comprising a gate and a gate dielectric layer between the gate and the channel region; (c) a first dielectric layer adjacent to the gate electrode and in contact with the source and drain terminals, the first dielectric layer comprising a material which comprises a dopant therein; and (d) an electrically functional source/drain extensions in the channel region, adjacent to the source and drain terminals, comprising a material which comprises the same dopant as the first dielectric layer.Type: GrantFiled: February 2, 2010Date of Patent: June 7, 2011Assignee: Kovio, Inc.Inventor: James Montague Cleeves
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Publication number: 20100244133Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.Type: ApplicationFiled: June 9, 2010Publication date: September 30, 2010Inventors: Arvind KAMATH, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
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Publication number: 20100231362Abstract: Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.Type: ApplicationFiled: May 25, 2010Publication date: September 16, 2010Inventors: Patrick SMITH, James Montague Cleeves, Vikram Pavate, Vivek Subramanian
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Patent number: 7767520Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.Type: GrantFiled: August 3, 2007Date of Patent: August 3, 2010Assignee: Kovio, Inc.Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
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Patent number: 7750792Abstract: Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.Type: GrantFiled: October 11, 2007Date of Patent: July 6, 2010Assignee: Kovio, Inc.Inventors: Patrick Smith, James Montague Cleeves, Vikram Pavate, Vivek Subramanian
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Publication number: 20100163962Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.Type: ApplicationFiled: March 12, 2010Publication date: July 1, 2010Inventors: Arvind Kamath, Patrick Smith, James Montague Cleeves