Patents by Inventor James Montague
James Montague has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8138921Abstract: A method for reliable deactivation of a security (EAS) tag, and an apparatus for accomplishing the same. The method generally includes placing a security tag a first distance from a deactivation apparatus; determining whether a deactivation confirmation signal has occurred; and when it is determined that the deactivation confirmation signal did not occur, placing the security tag closer to the deactivation apparatus.Type: GrantFiled: August 8, 2008Date of Patent: March 20, 2012Assignee: Kovio, Inc.Inventors: James Montague Cleeves, Vivek Subramanian
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Publication number: 20110178321Abstract: Dopant-group substituted (cyclo)silane compounds, liquid-phase compositions containing such compounds, and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous or polycrystalline silicon film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a doped “liquid silicon” composition.Type: ApplicationFiled: January 18, 2010Publication date: July 21, 2011Inventors: Wenzhuo GUO, Vladimir K. Dioumaev, Brent Ridley, Fabio Zürcher, Joerg Rockenberger, James Montague Cleeves
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Patent number: 7981482Abstract: Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA atom source and a dopant source. By irradiating a doped liquid silane during at least part of its deposition, a thin, substantially uniform doped oligomerized/polymerized silane film may be formed on a substrate. Such irradiation is believed to convert the doped silane film into a relatively high-molecular weight species with relatively high viscosity and relatively low volatility, typically by cross-linking, isomerization, oligomerization and/or polymerization. A film formed by the irradiation of doped liquid silanes can later be converted (generally by heating and annealing/recrystallization) into a doped, hydrogenated, amorphous silicon film or a doped, at least partially polycrystalline silicon film suitable for electronic devices.Type: GrantFiled: June 19, 2006Date of Patent: July 19, 2011Assignee: Kovio, Inc.Inventors: Fabio Zürcher, Wenzhuo Guo, Joerg Rockenberger, Vladimir K. Dioumaev, Brent Ridley, Klaus Kunze, James Montague Cleeves
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Patent number: 7956425Abstract: Thin film transistors (TFT) and methods for making same. The TFTs generally comprise: (a) a semiconductor layer comprising source and drain terminals and a channel region therebetween; (b) a gate electrode comprising a gate and a gate dielectric layer between the gate and the channel region; (c) a first dielectric layer adjacent to the gate electrode and in contact with the source and drain terminals, the first dielectric layer comprising a material which comprises a dopant therein; and (d) an electrically functional source/drain extensions in the channel region, adjacent to the source and drain terminals, comprising a material which comprises the same dopant as the first dielectric layer.Type: GrantFiled: February 2, 2010Date of Patent: June 7, 2011Assignee: Kovio, Inc.Inventor: James Montague Cleeves
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Publication number: 20100244133Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.Type: ApplicationFiled: June 9, 2010Publication date: September 30, 2010Inventors: Arvind KAMATH, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
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Publication number: 20100231362Abstract: Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.Type: ApplicationFiled: May 25, 2010Publication date: September 16, 2010Inventors: Patrick SMITH, James Montague Cleeves, Vikram Pavate, Vivek Subramanian
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Patent number: 7767520Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.Type: GrantFiled: August 3, 2007Date of Patent: August 3, 2010Assignee: Kovio, Inc.Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
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Patent number: 7750792Abstract: Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.Type: GrantFiled: October 11, 2007Date of Patent: July 6, 2010Assignee: Kovio, Inc.Inventors: Patrick Smith, James Montague Cleeves, Vikram Pavate, Vivek Subramanian
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Publication number: 20100163962Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.Type: ApplicationFiled: March 12, 2010Publication date: July 1, 2010Inventors: Arvind Kamath, Patrick Smith, James Montague Cleeves
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Publication number: 20100148859Abstract: Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g.Type: ApplicationFiled: January 19, 2010Publication date: June 17, 2010Inventors: James Montague CLEEVES, J. Devin MacKenzie, Arvind Kamath
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Publication number: 20100123582Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.Type: ApplicationFiled: May 15, 2009Publication date: May 20, 2010Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
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Patent number: 7709307Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.Type: GrantFiled: August 21, 2007Date of Patent: May 4, 2010Assignee: Kovio, Inc.Inventors: Arvind Kamath, Patrick Smith, James Montague Cleeves
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Patent number: 7701011Abstract: An electronic device, including a substrate, a plurality of first semiconductor islands on the substrate, a plurality of second semiconductor islands on the substrate, a first dielectric film on the first subset of the semiconductor islands, second dielectric film on the second semiconductor islands, and a metal layer in electrical contact with the first and second semiconductor islands. The first semiconductor islands and the first dielectric film contain a first diffusible dopant, and the second semiconductor islands and the second dielectric layer film contain a second diffusible dopant different from the first diffusible dopant. The present electronic device can be manufactured using printing technologies, thereby enabling high-throughput, low-cost manufacturing of electrical circuits on a wide variety of substrates.Type: GrantFiled: August 3, 2007Date of Patent: April 20, 2010Assignee: Kovio, Inc.Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
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Patent number: 7691691Abstract: Thin film transistors (TFT) and methods for making same. The TFTs generally comprise: (a) a semiconductor layer comprising source and drain terminals and a channel region therebetween; (b) a gate electrode comprising a gate and a gate dielectric layer between the gate and the channel region; (c) a first dielectric layer adjacent to the gate electrode and in contact with the source and drain terminals, the first dielectric layer comprising a material which comprises a dopant therein; and (d) an electrically functional source/drain extensions in the channel region, adjacent to the source and drain terminals, comprising a material which comprises the same dopant as the first dielectric layer.Type: GrantFiled: May 23, 2007Date of Patent: April 6, 2010Assignee: Kovio, Inc.Inventor: James Montague Cleeves
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Patent number: 7687327Abstract: Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g.Type: GrantFiled: June 12, 2006Date of Patent: March 30, 2010Assignee: Kovio, Inc,Inventors: James Montague Cleeves, J. Devin MacKenzie, Arvind Kamath
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Patent number: 7674926Abstract: Dopant-group substituted (cyclo)silane compounds, liquid-phase compositions containing such compounds, and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous or polycrystalline silicon film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a doped “liquid silicon” composition.Type: GrantFiled: October 1, 2004Date of Patent: March 9, 2010Assignee: Kovio, Inc.Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Brent Ridley, Fabio Zūrcher, Joerg Rockenberger, James Montague Cleeves
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Patent number: 7675464Abstract: A method of making a double-sided antenna for high frequency devices is discussed. The method includes forming metal patterns on both sides of a substrate having pre-formed connection holes. Preferably, the metal patterns are formed using a printing ink having a precursor and a solvent. In one embodiment, the metal patterns include coils which are formed on both sides of the substrate. In one embodiment, shunt bars are used to speed up the process of making the metal patterns. The shunt bars are punched out at the end of the process to electrically isolate the metal patterns.Type: GrantFiled: May 15, 2007Date of Patent: March 9, 2010Assignee: Kovio, Inc.Inventor: James Montague Cleeves
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Patent number: 7619248Abstract: A MOS transistor with self-aligned source/drain terminals, and methods for its manufacture. The transistor generally includes an electrically functional substrate, a dielectric film on portions of the substrate, a gate on the dielectric film, and polycrystalline source and drain terminals self-aligned with the gate. The method generally includes forming an amorphous semiconductor material on a gate and on exposed portions of an electrically functional substrate, irradiating an upper surface of the amorphous semiconductor material to form self-aligned polycrystalline semiconducting source/drain terminal layers, and (optionally) selectively removing the non-irradiated amorphous semiconductor material portions. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.Type: GrantFiled: March 18, 2005Date of Patent: November 17, 2009Assignee: Kovio, Inc.Inventor: James Montague Cleeves
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Publication number: 20090137071Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.Type: ApplicationFiled: October 10, 2008Publication date: May 28, 2009Inventors: Vivek SUBRAMANIAN, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
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Publication number: 20090109035Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.Type: ApplicationFiled: October 10, 2008Publication date: April 30, 2009Inventors: Vivek SUBRAMANIAN, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves