Abstract: A converter circuit includes a power stage circuit configured to convert an input voltage received by an inductor to an output voltage provided at an output; a control circuit configured to generate input pulses to control the power stage circuit; a slope compensation circuit configured to provide a compensation signal to the control circuit for overcoming a sub-harmonic oscillation in the converter circuit, wherein the control circuit is configured to generate the input pulses based at least in part on the compensation signal; a slope compensation adjustment circuit configured to determine a rate of change of a current at the inductor and to provide a slope compensation adjustment signal based on the determined rate of change; and a modulation circuit configured to modulate the compensation signal with the slope compensation adjustment signal to produce the adjusted slope compensation signal.

Abstract: A converter circuit includes a power stage circuit configured to convert an input voltage received by an inductor to an output voltage provided at an output; a control circuit configured to generate input pulses to control the power stage circuit; a slope compensation circuit configured to provide a compensation signal to the control circuit for overcoming a sub-harmonic oscillation in the converter circuit, wherein the control circuit is configured to generate the input pulses based at least in part on the compensation signal; a slope compensation adjustment circuit configured to determine a rate of change of a current at the inductor and to provide a slope compensation adjustment signal based on the determined rate of change; and a modulation circuit configured to modulate the compensation signal with the slope compensation adjustment signal to produce the adjusted slope compensation signal.

Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.

Abstract: A converter circuit includes a power stage circuit configured to convert an input voltage received by an inductor to an output voltage provided at an output; a control circuit configured to generate input pulses to control the power stage circuit; a slope compensation circuit configured to provide a compensation signal to the control circuit for overcoming a sub-harmonic oscillation in the converter circuit, wherein the control circuit is configured to generate the input pulses based at least in part on the compensation signal; a slope compensation adjustment circuit configured to determine a rate of change of a current at the inductor and to provide a slope compensation adjustment signal based on the determined rate of change; and a modulation circuit configured to modulate the compensation signal with the slope compensation adjustment signal to produce the adjusted slope compensation signal.

Abstract: A programmable load transient circuit includes a switchable power device for coupling a DUT output to its non-control node in series with a current sense device. A feedback loop is between the current sense device and the power device's control node that includes an integrator including an amplifier coupled to receive a signal that is a function of an average load current (IDavg) supplied by the DUT from the current sense device and to receive a reference voltage (Vref). The integrator provides an output drive voltage that is coupled to an input of a level shifter which receives a pulse signal or DC level at another of its inputs. The level shifter provides an output waveform or DC voltage to the power device's control node that is a function of IDavg.

Abstract: A programmable load transient circuit includes a switchable power device for coupling a DUT output to its non-control node in series with a current sense device. A feedback loop is between the current sense device and the power device's control node that includes an integrator including an amplifier coupled to receive a signal that is a function of an average load current (IDavg) supplied by the DUT from the current sense device and to receive a reference voltage (Vref). The integrator provides an output drive voltage that is coupled to an input of a level shifter which receives a pulse signal or DC level at another of its inputs. The level shifter provides an output waveform or DC voltage to the power device's control node that is a function of IDavg.

Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.

Abstract: An integrated circuit having at least one electrically-controlled control loop that includes one or more loop error amplifiers also includes an analog-to-digital converter having both an input that operably couples to two inputs of each loop error amplifier and an output that couples to an off-chip hardware component comprising a control circuit. This control circuit reads digital versions that correspond to the loop error amplifier inputs. When a particular first input is greater than a second input, the control circuit sources a calibration signal to modify and offset for the loop error amplifier in a first direction. When the first input is less than the second input, the control circuit sources a calibration signal to modify the offset for the loop error amplifier in a second direction that is different from the aforementioned first direction. By one approach the control circuit also controls a sampling rate of the analog-to-digital converter.

Abstract: This invention relates to high purity yttria or ytterbia stabilized zirconia powders comprising from about 0 to about 0.15 weight percent impurity oxides, from about 0 to about 2 weight percent hafnium oxide (hafnia), from about 6 to about 25 weight percent yttrium oxide (yttria) or from about 10 to about 36 weight percent ytterbium oxide (ytterbia), and the balance zirconium oxide (zirconia). Thermal barrier coatings for protecting a component such as blades, vanes and seal surfaces of gas turbine engines, made from the high purity yttria or ytterbia stabilized zirconia powders, have a density greater than 88% of the theoretical density with a plurality of verticalzA macrocracks homogeneously dispersed throughout the coating to improve its thermal fatigue resistance.

Abstract: This invention relates to high purity yttria or ytterbia stabilized zirconia powders comprising from about 0 to about 0.15 weight percent impurity oxides, from about 0 to about 2 weight percent hafnium oxide (hafnia), from about 6 to about 25 weight percent yttrium oxide (yttria) or from about 10 to about 36 weight percent ytterbium oxide (ytterbia), and the balance zirconium oxide (zirconia). Thermal barrier coatings for protecting a component such as blades, vanes and seal surfaces of gas turbine engines, made from the high purity yttria or ytterbia stabilized zirconia powders, have a density greater than 88% of the theoretical density with a plurality of verticalzA macrocracks homogeneously dispersed throughout the coating to improve its thermal fatigue resistance.

Abstract: This invention relates to high purity yttria or ytterbia stabilized zirconia powders comprising from about 0 to about 0.15 weight percent impurity oxides, from about 0 to about 2 weight percent hafnium oxide (hafnia), from about 6 to about 25 weight percent yttrium oxide (yttria) or from about 10 to about 36 weight percent ytterbium oxide (ytterbia), and the balance zirconium oxide (zirconia). Thermal barrier coatings for protecting a component such as blades, vanes and seal surfaces of gas turbine engines, made from the high purity yttria or ytterbia stabilized zirconia powders, have a density greater than 88% of the theoretical density with a plurality of vertical macrocracks homogeneously dispersed throughout the coating to improve its thermal fatigue resistance.

Abstract: This invention relates to high purity yttria or ytterbia stabilized zirconia powders comprising from about 0 to about 0.15 weight percent impurity oxides, from about 0 to about 2 weight percent hafnium oxide (hafnia), from about 6 to about 25 weight percent yttrium oxide (yttria) or from about 10 to about 36 weight percent ytterbium oxide (ytterbia), and the balance zirconium oxide (zirconia). Thermal barrier coatings for protecting a component such as blades, vanes and seal surfaces of gas turbine engines, made from the high purity yttria or ytterbia stabilized zirconia powders, have a density greater than 88% of the theoretical density with a plurality of vertical macrocracks homogeneously dispersed throughout the coating to improve its thermal fatigue resistance.

Abstract: A binding lifter for a ski includes a fastener retention layer, a lifter core extension above and below the fastener retention layer and an exterior layer over at least a portion of the lifter core. The fastener retention layer has a greater density than the lifter core. Binding fasteners are securable to the fastener retention layer.