Patents by Inventor James N. Hollenhorst

James N. Hollenhorst has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7586480
    Abstract: An input device having a movable puck and display screen is disclosed. The puck is confined to move on a puck surface having a puck field of motion defined thereon. The puck field of motion is divided into a pointing region and a function region. A controller determines a position for the puck within the field of motion. The display screen displays a two-dimensional scene and a cursor that moves within the scene in a manner controlled by the position of the puck when the puck is in the pointing region. The controller causes the scene to change when the puck is in the function region. A deformable barrier that inhibits the movement of the puck into the function region can be used to prevent inadvertent changing of the display scene. The inhibition is overcome by a user applying additional force to the puck in a direction parallel to the surface.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: September 8, 2009
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Todd Stephen Sachs, Jonah Alexander Harley, James N. Hollenhorst, Farid Matta
  • Patent number: 6858829
    Abstract: A photodiode array includes a plurality of arrayed individual diode devices. The arrayed diode devices include at least one active photodiode and at least one reference diode. A bias control circuit for the array monitors operation of the reference diode at an applied first bias voltage and adjusts that applied first bias voltage until optimal reference diode operation is reached. A second bias voltage having predetermined relationship to the first bias voltage is applied to the active photodiode to optimally configure array operation. More specifically, an operational characteristic of the reference diode at the first bias voltage is monitored and compared to a reference value. As a result of this comparison, the circuit adjusts the applied first and second bias voltage in order to drive the reference diode measured characteristic to substantially match the reference value.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: February 22, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Ken A. Nishimura, Brian E. Lemoff, James N. Hollenhorst
  • Publication number: 20020195545
    Abstract: A photodiode array includes a plurality of arrayed individual diode devices. The arrayed diode devices include at least one active photodiode and at least one reference diode. A bias control circuit for the array monitors operation of the reference diode at an applied first bias voltage and adjusts that applied first bias voltage until optimal reference diode operation is reached. A second bias voltage having predetermined relationship to the first bias voltage is applied to the active photodiode to optimally configure array operation. More specifically, an operational characteristic of the reference diode at the first bias voltage is monitored and compared to a reference value. As a result of this comparison, the circuit adjusts the applied first and second bias voltage in order to drive the reference diode measured characteristic to substantially match the reference value.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Ken A. Nishimura, Brian E. Lemoff, James N. Hollenhorst
  • Patent number: 5866936
    Abstract: A mesa-structure avalanche photodiode in which a buffer region in the surface of the mesa structure effectively eliminates the sharply-angled, heavily doped part of the cap layer that existed adjacent the lightly-doped n-type multiplication layer and p-type guard ring before the buffer region was formed. This reduces electric field strength at the ends of the planar epitaxial P-N junction and prevents edge breakdown in this junction. The lateral extent of the guard ring is defined by a window formed in a masking layer prior to regrowth of the guard ring. This guard ring structure eliminates the need to perform additional processing steps to define the lateral extent of the guard ring and passivate the periphery of the guard ring.
    Type: Grant
    Filed: April 1, 1997
    Date of Patent: February 2, 1999
    Assignee: Hewlett-Packard Company
    Inventors: Ghulam Hasnain, James N. Hollenhorst, Chung-Yi Su
  • Patent number: 5843804
    Abstract: A SAM avalanche photodiode formed with an epitaxially regrown guard ring and a planar P-N junction defined between a cap layer and a multiplication layer. The multiplication layer is part of a multi-layer semiconductor platform having a conductivity opposite to the conductivity type of the cap layer, including a light absorption layer, a substrate and an intermediate layer. A second embodiment of the present invention is disclosed including a SAM avalanche photodiode having a guard ring with a variable distribution of impurity dopant concentrations. In addition, a third embodiment of the present invention is disclosed in which a narrow band gap layer completely covers the cap layer and a non-alloy metal contact is formed to completely cover the narrow band gap layer, forming a mirror junction. In this embodiment, incident light is shined through the substrate and reflected from the mirror junction, enhancing the absorption efficiency.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: December 1, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Chung-Yi Su, Ghulam Hasnain, James N. Hollenhorst
  • Patent number: 5610416
    Abstract: A SAM avalanche photodiode formed with an epitaxially regrown guard ring and a planar P-N junction defined between a cap layer and a multiplication layer. The multiplication layer is part of a multi-layer semiconductor platform having a conductivity opposite to the conductivity type of the cap layer, including a light absorption layer, a substrate and an intermediate layer. A second embodiment of the present invention is disclosed including a SAM avalanche photodiode having a guard ring with a variable distribution of impurity dopant concentrations. In addition, a third embodiment of the present invention is disclosed in which a narrow band gap layer completely covers the cap layer and a non-alloy metal contact is formed to completely cover the narrow band gap layer, forming a mirror junction. In this embodiment, incident light is shined through the substrate and reflected from the mirror junction, enhancing the absorption efficiency.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: March 11, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Chung-Yi Su, Ghulam Hasnain, James N. Hollenhorst
  • Patent number: 5075749
    Abstract: Substrate-supported optical device structures such as, e.g., quantum-well infrared detectors/detector arrays are provided with a grating for optical coupling. Preferred gratings are formed in a nonepitaxial layer which, preferably, consists of a material which is different from underlying semiconductor material. Conveniently, a grating pattern is formed by etching, with the underlying material serving as an etch stop. For example, on a GaAs--AlGaAs device, polycrystalline silicon can be deposited and etched in this fashion.
    Type: Grant
    Filed: April 1, 1991
    Date of Patent: December 24, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Gou-Chung Chi, James N. Hollenhorst, Robert A. Morgan, Dirk J. Muehlner