Patents by Inventor James N. Lee

James N. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960722
    Abstract: A memory device includes an array of memory cells and a controller configured to access the array of memory cells. The controller is further configured to program a first number of bits to a first memory cell of the array of memory cells and program a second number of bits to a second memory cell of the array of memory cells. The controller is further configured to following a period after programming the second number of bits to the second memory cell, merge at least a subset of the first number of bits stored in the first memory cell to the second number of bits stored in the second memory cell without erasing the second memory cell such that the second number of bits plus at least the subset of the first number of bits are stored in the second memory cell.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Tomoharu Tanaka, Huai-Yuan Tseng, Dung V. Nguyen, Kishore Kumar Muchherla, Eric N. Lee, Akira Goda, James Fitzpatrick, Dave Ebsen
  • Publication number: 20240087651
    Abstract: Exemplary methods, apparatuses, and systems include an adaptive pre-read manager for controlling pre-reads of the memory device. The adaptive pre-read manager receives a first set of data bits for programming to memory. The adaptive pre-read manager performing a first pass of programming including a first subset of data bits from the set of data bits. The adaptive pre-read manager compares a set of threshold operating differences to a set of differences between multiple operating conditions during the first pass of programming and current operating conditions. The adaptive pre-read manager performs an internal pre-read of the programmed first subset of data bits. The adaptive pre-read manager performs a second pass of programming using the internal pre-read and a second subset of data bits from the first set of data bits.
    Type: Application
    Filed: September 9, 2022
    Publication date: March 14, 2024
    Inventors: Kishore Kumar Muchherla, Huai-Yuan Tseng, Akira Goda, Dung V. Nguyen, Giovanni Maria Paolucci, James Fitzpatrick, Eric N. Lee, Dave Scott Ebsen, Tomoharu Tanaka
  • Patent number: 4694252
    Abstract: A method of calculating the intrinsic parameters including the spin-lattice relaxation time T1 and the spin-spin relaxation time T2 for Nuclear Magnetic Resonance (NMR) technique which utilizes calculations of derived algorithms by a series of passthroughs of a digital video processor. The use of a digital video processor to accomplish the algorithm construction provides a significant increase in the speed with which the intrinsic parameters can be calculated.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: September 15, 1987
    Assignee: Duke University
    Inventors: Stephen J. Riederer, Ronald C. Wright, James N. Lee
  • Patent number: 4634979
    Abstract: Intrinsic parameters T.sub.1, T.sub.2 and M.sub.o of the materials in a body under NMR examination are determined by conducting a small number of actual NMR measurements and analyzing the derived data, the measurements being made at different repetition and delay times. The intrinsic parameters are then used to synthesize images which simulate those which would have been generated using other delay and repetition times in an actual measurement process. A processing apparatus is disclosed which operates in real time, permitting an operator to interactively modify the delay and repetition times while observing successive displays which simulates measurements made using those times.
    Type: Grant
    Filed: April 26, 1985
    Date of Patent: January 6, 1987
    Assignee: Duke University
    Inventors: Stephen J. Riederer, James N. Lee