Abstract: Embodiments provide a switching device including one or more field-effect transistors (FETs). In embodiments, a body-bias circuit may derive a bias voltage based on a radio frequency signal applied to a switch field-effect transistor and apply the bias voltage to the body terminal of the switch field-effect transistor.

Abstract: Embodiments provide a switching device including one or more cells. In embodiments, a cell may include a switch field-effect transistor (FET) and a source-follower FET, coupled between a gate and a body of the switch FET. Other embodiments may be described and claimed.

Abstract: Embodiments provide a variable-impedance transmission line. In some embodiments, a variable-impedance transmission line may include one or more conductors that may be isolated or configured as parts of forward or return paths based on states of switches of the variable-impedance transmission line. Other embodiments may be described and claimed.

Abstract: Embodiments provide a switching device including a field-effect transistor (FET) having a source terminal, a drain terminal, a gate terminal, and a body terminal. The FET may be switchable between an on state, in which the FET passes a transmission signal between the source terminal and the drain terminal, and an off state, in which the FET prevents a transmission signal from passing between the source terminal and the drain terminal. The FET may receive a control signal at the gate terminal to switch the FET between the on state and the off state. The switching device may further include one or more forward diodes coupled between the gate terminal and the body terminal to bias the body terminal during the on state, and one or more reverse diodes coupled between the gate terminal and the body terminal to bias the body terminal during the off state.

Abstract: Embodiments provide a switching device including one or more field-effect transistors (FETs). In embodiments, a resistive divider comprising a first resistor and a second resistor may be coupled with the FET at a position electrically between a gate terminal of the FET and a body terminal of the FET.

Abstract: Embodiments provide a switching device including one or more field-effect transistors (FETs) and bias circuitry. The one or more FETs may transition between an off state and an on state to facilitate switching of a transmission signal. The one or more FETs may include a drain terminal, a source terminal, a gate terminal, and a body. The biasing circuitry may bias the drain terminal and the source terminal to a first DC voltage in the on state and a second DC voltage in the off state. The first and second DC voltages may be non-negative. The biasing circuitry may be further configured to bias the gate terminal to the first DC voltage in the off state and the second DC voltage in the on state.

Abstract: Embodiments provide a switching device including one or more field-effect transistors (FETs) and bias circuitry. The one or more FETs may transition between an off state and an on state to facilitate switching of a transmission signal. The one or more FETs may include a drain terminal, a source terminal, a gate terminal, and a body. The biasing circuitry may bias the drain terminal and the source terminal to a first DC voltage in the on state and a second DC voltage in the off state. The first and second DC voltages may be non-negative. The biasing circuitry may be further configured to bias the gate terminal to the first DC voltage in the off state and the second DC voltage in the on state.

Abstract: A method of a modeling metallization parasitics with the use of a simulation program. In one embodiment, a method of simulating interconnect lines in an electronic design automation simulation is disclosed. The method comprises partitioning the interconnect lines into groups of interconnect lines. Each group of interconnect lines does not have interactions with any of the other groups of interconnect lines. Moreover, at least one of the groups of interconnect lines contains at least three interconnect lines. The interconnect lines in each group are modeled. The modeling includes at least one of modeling mutual inductances and modeling of mutual capacitances.

Abstract: The unwanted variation in operating point associated with varying the gain of a common input/output electrode transistor, such as a common emitter bipolar transistor, is obviated by coupling an electronically controllable conductance in a negative feedback path between a first input/output electrode (collector) and the control electrode (base) of the transistor. In a first embodiment applied to a bipolar device, the electronically controlled feedback element comprises a diode, having its forward conductance varied by adjusting current flow through a controllable current source. This controls the amount of feedback from the collector to the base and thereby the forward loop gain of the common emitter transistor. In a second embodiment for a bipolar device, the controlled feedback element comprises an emitter-follower transistor, with its forward gain controlled by varying the current drawn through its emitter by a controllable current source/sink.

Abstract: A frequency dependent resistor in which the length of the current path across the resistor varies as a function of the frequency of the electrical signals being passed therethrough. The resistor uses the principal known as skin effect to direct relatively higher frequency signals through a longer path through the resistor than is experienced by signals having a relatively low frequency.

Abstract: A frequency dependent resistor in which the length of the current path across the resistor varies as a function of the frequency of the electrical signals being passed therethrough. The resistor uses the principal known as skin effect to direct relatively higher frequency signals through a longer path through the resistor than is experienced by signals having a relatively low frequency.

Abstract: A method and mount for a high frequency IC that provides a low inductance path for a high frequency current from the IC to the exterior of a package for the IC and the mount. An electrically and thermally conductive metal base for mounting the IC on an upper surface thereof has a lower surface exposed at the exterior of the package that otherwise encloses the base and the IC. The base also has a plurality of solid or hollow columns for increasing a surface area of the mount, thereby decreasing the inductance to a high frequency current in the path between the IC and the lower surface of the base. Each column is electrically connected to a separate ground terminal on the IC. The columns may have narrow necks connecting them to the base to limit common mode inductance between columns, or may be separated from the base to eliminate common mode inductance.

Abstract: Improved operation of a differentially coupled transistor circuit is achieved by modulating the circuit's bias current as a function of the input differential voltage. The bias current-modulated, differentially coupled transistor circuit includes first and second differentially transistor pairs, the bases of which are coupled across input terminals to which the differential voltage is applied. The emitters of the first transistor pair are coupled in common to a first constant bias current source, and the emitters of the second transistor pair are coupled in common to a second constant bias current source. The collector of one of the transistors of the first pair is coupled to the collector of the differentially coupled transistor of the second pair, so as to provide a first summation collector current.

Abstract: A current cancellation circuit having, and method for producing, a low noise spectral density current for cancelling the DC input bias current of an input signal to an amplifier. The cancellation circuit provides for generating a DC cancelling current having a magnitude K times greater than the magnitude of the input DC bias current and then reducing the same by K times. The resulting cancelling current has a reduced noise current spectral density associated with it, thereby reducing the overall noise current spectral density of the input stage.