Patents by Inventor James P. Letterman
James P. Letterman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11145581Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.Type: GrantFiled: November 19, 2018Date of Patent: October 12, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Patent number: 11049843Abstract: Methods of forming a semiconductor package. Implementations include providing a leadframe, coupling a semiconductor die or an electronic component to the leadframe, and encapsulating at least a portion of the semiconductor die or the electronic component using a mold compound leaving two or more leads of the leadframe exposed. The method may also include coating the two or more leads of the leadframe with an electrically conductive layer. The method may include fully electrically and physically singulating one or more tie bars between two or more leads of the leadframe, a lead of the two or more leads and a leadframe flag, or any combination thereof. The method may also include singulating the leadframe to form one or more semiconductor packages.Type: GrantFiled: April 18, 2019Date of Patent: June 29, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Phillip Celaya, James P. Letterman, Jr., Robert L. Marquis, Darrell Truhitte
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Patent number: 10770332Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: GrantFiled: March 5, 2019Date of Patent: September 8, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Patent number: 10770333Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: GrantFiled: March 5, 2019Date of Patent: September 8, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Patent number: 10707111Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: GrantFiled: March 5, 2019Date of Patent: July 7, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Patent number: 10529632Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.Type: GrantFiled: September 11, 2018Date of Patent: January 7, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Publication number: 20190244928Abstract: Methods of forming a semiconductor package. Implementations include providing a leadframe, coupling a semiconductor die or an electronic component to the leadframe, and encapsulating at least a portion of the semiconductor die or the electronic component using a mold compound leaving two or more leads of the leadframe exposed. The method may also include coating the two or more leads of the leadframe with an electrically conductive layer. The method may include fully electrically and physically singulating one or more tie bars between two or more leads of the leadframe, a lead of the two or more leads and a leadframe flag, or any combination thereof. The method may also include singulating the leadframe to form one or more semiconductor packages.Type: ApplicationFiled: April 18, 2019Publication date: August 8, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Phillip CELAYA, James P. LETTERMAN, JR., Robert L. MARQUIS, Darrell TRUHITTE
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Publication number: 20190198375Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: ApplicationFiled: March 5, 2019Publication date: June 27, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Publication number: 20190198376Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: ApplicationFiled: March 5, 2019Publication date: June 27, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Publication number: 20190198374Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: ApplicationFiled: March 5, 2019Publication date: June 27, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Patent number: 10304798Abstract: Methods of forming a semiconductor package. Implementations include providing a leadframe, coupling a semiconductor die or an electronic component to the leadframe, and encapsulating at least a portion of the semiconductor die or the electronic component using a mold compound leaving two or more leads of the leadframe exposed. The method may also include coating the two or more leads of the leadframe with an electrically conductive layer. The method may include fully electrically and physically singulating one or more tie bars between two or more leads of the leadframe, a lead of the two or more leads and a leadframe flag, or any combination thereof. The method may also include singulating the leadframe to form one or more semiconductor packages.Type: GrantFiled: January 12, 2018Date of Patent: May 28, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Phillip Celaya, James P. Letterman, Jr., Robert L. Marquis, Darrell Truhitte
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Patent number: 10269609Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: GrantFiled: January 30, 2018Date of Patent: April 23, 2019Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Publication number: 20190088579Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.Type: ApplicationFiled: November 19, 2018Publication date: March 21, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Publication number: 20190013249Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.Type: ApplicationFiled: September 11, 2018Publication date: January 10, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Patent number: 10163766Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.Type: GrantFiled: November 21, 2016Date of Patent: December 25, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Patent number: 10103072Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.Type: GrantFiled: August 18, 2016Date of Patent: October 16, 2018Assignee: Semiconductor Components Industries, LLCInventors: Darrell D. Truhitte, James P. Letterman, Jr.
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Publication number: 20180174881Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.Type: ApplicationFiled: January 30, 2018Publication date: June 21, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Publication number: 20180145013Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.Type: ApplicationFiled: November 21, 2016Publication date: May 24, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
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Publication number: 20180138144Abstract: Methods of forming a semiconductor package. Implementations include providing a leadframe, coupling a semiconductor die or an electronic component to the leadframe, and encapsulating at least a portion of the semiconductor die or the electronic component using a mold compound leaving two or more leads of the leadframe exposed. The method may also include coating the two or more leads of the leadframe with an electrically conductive layer. The method may include fully electrically and physically singulating one or more tie bars between two or more leads of the leadframe, a lead of the two or more leads and a leadframe flag, or any combination thereof. The method may also include singulating the leadframe to form one or more semiconductor packages.Type: ApplicationFiled: January 12, 2018Publication date: May 17, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Phillip CELAYA, James P. LETTERMAN, JR., Robert L. MARQUIS, Darrell TRUHITTE
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Publication number: 20180053696Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.Type: ApplicationFiled: August 18, 2016Publication date: February 22, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.