Abstract: Flame retardant panels generally include an adaptive cover layer and underlying batting layer. The cover layer includes a moisture vapor permeable synthetic fibrous layer, and a liquid impermeable but moisture vapor permeable thermoplastic layer disposed on an outer face of the cover layer, wherein the liquid impermeable but moisture vapor permeable thermoplastic layer is in an amount of about 2 to 15% by weight based on a total weight of the synthetic fibrous layer and the thermoplastic layer. The underlying batting layer can have a top surface and a bottom surface, the layer comprising a plurality of substantially vertically oriented flame retardant treated fibers extending from the top surface to the bottom surface; and a binder material.

Abstract: A navigation system integrated into a materials transport vehicle for use by an operator, the system including a plurality of display devices each having a screen; a location determining component operable to determine the current location of the materials transport vehicle; a memory operable to store one or more modules, the memory including vehicle operator transport preferences comprising time periods available for operating the materials transport vehicle and materials transport requirements comprising a materials transport destination; and a processor operable to execute the one or more modules to determine a transport schedule for use by the materials transport vehicle operator, the transport schedule based on the materials transport requirements and the vehicle operator transport preferences, determine a transport route from the current location to the materials transport destination using the transport schedule, and present the transport route on one of the display devices.

Abstract: Flame retardant panels generally include an adaptive cover layer and underlying batting layer. The cover layer includes a moisture vapor permeable synthetic fibrous layer, and a liquid impermeable but moisture vapor permeable thermoplastic layer disposed on an outer face of the cover layer, wherein the liquid impermeable but moisture vapor permeable thermoplastic layer is in an amount of about 2 to 15% by weight based on a total weight of the synthetic fibrous layer and the thermoplastic layer. The underlying batting layer can have a top surface and a bottom surface, the layer comprising a plurality of substantially vertically oriented flame retardant treated fibers extending from the top surface to the bottom surface; and a binder material.

Abstract: A mattress display includes at least one primary test bed including a head portion and a foot portion; at least one secondary test bed including a head portion and a foot portion; a wall, wherein the at least one primary and secondary test beds are in a spaced apart parallel relationship and positioned perpendicular with respect to the wall, wherein the at least one primary test bed is oriented such that the head portion is distally located from the wall and the foot portion 20 is proximal to the wall, and wherein the at least one secondary test bed is oriented such the head portion is proximal to the wall and the foot portion is distal to the wall; and a barrier disposed in close proximity to the head portion of the primary test bed, wherein the barrier is configured to provide an end user of the primary test bed with at least partial privacy, noise reduction, and/or light reduction.

Abstract: A mattress display includes at least one primary test bed including a head portion and a foot portion; at least one secondary test bed including a head portion and a foot portion; a wall, wherein the at least one primary and secondary test beds are in a spaced apart parallel relationship and positioned perpendicular with respect to the wall, wherein the at least one primary test bed is oriented such that the head portion is distally located from the wall and the foot portion 20 is proximal to the wall, and wherein the at least one secondary test bed is oriented such the head portion is proximal to the wall and the foot portion is distal to the wall; and a barrier disposed in close proximity to the head portion of the primary test bed, wherein the barrier is configured to provide an end user of the primary test bed with at least partial privacy, noise reduction, and/or light reduction.

Abstract: A navigation system integrated into a materials transport vehicle for use by an operator, the system including a plurality of display devices each having a screen; a location determining component operable to determine the current location of the materials transport vehicle; a memory operable to store one or more modules, the memory including vehicle operator transport preferences comprising time periods available for operating the materials transport vehicle and materials transport requirements comprising a materials transport destination; and a processor operable to execute the one or more modules to determine a transport schedule for use by the materials transport vehicle operator, the transport schedule based on the materials transport requirements and the vehicle operator transport preferences, determine a transport route from the current location to the materials transport destination using the transport schedule, and present the transport route on one of the display devices.

Abstract: The various embodiments of the present invention relate to coupling clock signals between a plurality of data transceivers. According to one embodiment, a clock routing circuit having data transceivers comprises a clock bus interface and a first data transceiver coupled to the clock bus interface to receive a clock signal from the clock bus interface. A clock bus coupled to receive the clock signal enables the transfer of the clock signal to an adjacent data transceiver. According to other embodiments, various clock buses and interfaces enable routing clock signals between various circuits of the integrated circuit.

Abstract: A multi-stage phase detector (four stages in one described embodiment) comprises a plurality of data paths and phase paths that are buffered from a received serial data input stream to reduce loading. Each data path recovers a data bit and further functions as a transition detector to detect consecutive data bits having similar logic states. An exclusive NOR gate in the data path produces a control signal to disable a multiplexer in the phase path when two data bits have similar logic states. Each phase path produces a sample of a serial data input stream and produces the sample to a multiplexer for coupling to a transconductance module. The multiplexer output is coupled to or decoupled from the transconductance module by the control signal from the data path to maintain phase-lock.

Abstract: A differential amplifier is configured to receive an input signal whose magnitude is referenced between a reference voltage and a first power supply magnitude. A differential current conducted by the differential amplifier induces current to be conducted by a first current mirror, which in turn induces current to be conducted by a second current mirror. The current conducted by the second current mirror produces an output signal that is referenced between the reference voltage and a second power supply magnitude.

Abstract: An integrated circuit (“IC”) includes a phase-locked loop (“PLL”) with a controllable oscillator embedded in the integrated circuit. A phase-lock circuit provides a lock control signal to the controllable oscillator; and a digital-to-analog converter (“DAC”) provides an oscillator adjustment signal to the controllable oscillator according to a digital code. The digital code is generated by an adjustment circuit configured in the fabric of a programmable logic device, or embedded in the IC, for example. In a particular embodiment, the DAC adjusts the PLL to reduce differential mode voltage in the phase-lock circuit.