Abstract: A method and system for prefetching instructions is disclosed. A signature may be updated in response to determining that a received instruction initiates a transition in function. A plurality of entries stored in a memory may be searched in response to determining the signature has been updated and a prefetch operation may be initiated in response to determining that the signature matches a given entry of the plurality of entries.

Abstract: In an embodiment, a prefetch circuit may implement prefetch “boosting” to reduce the cost of cold (compulsory) misses and thus potentially improve performance. When a demand miss occurs, the prefetch circuit may generate one or more prefetch requests. The prefetch circuit may monitor the progress of the demand miss (and optionally the previously-generated prefetch requests as well) through the cache hierarchy to memory. At various progress points, if the demand miss remains a miss, additional prefetch requests may be launched. For example, if the demand miss accesses a lower level cache and misses, additional prefetch requests may be launched because the latency avoided in prefetching the additional cache blocks is higher, which may over ride the potential that the additional cache blocks are incorrectly prefetched.