Patents by Inventor James R. Sciacero

James R. Sciacero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6636048
    Abstract: The present invention provides an apparatus for using time domain analysis of NEXT, Return Loss and the like, in conjunction with the application of time or distance referenced limits to verify and determine compliance of the performance requirements of connections in a typical link. Time domain analysis of NEXT, Return Loss data and the like suitably provides the performance characteristics of a link as a function of time or distance. When coupled with time or distance performance curves for connections, it can be determined if the transmission fault is at a connection or in the cable. The time limit curves for connections can be generated based on the frequency domain performance requirements for connecting hardware of a specific level of performance. The connection time limit curves thus allows one to determine if the connection is within performance standards, allowing improved isolation of the fault condition.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: October 21, 2003
    Assignee: Microbest, Inc.
    Inventors: James R. Sciacero, James G. Tonti
  • Patent number: 6522152
    Abstract: An Adaptive Vector Cancellation method which uses time domain data for an instrument connection to estimate magnitude, phase, and time position of a signal response such as NEXT or Return Loss associated with the connection. Based on the estimate of the amplitude and time of the connection response, a suitable full-bandwidth frequency response that corresponds to a point source of NEXT or Return Loss is determined. This calculated connector response is then scaled to an appropriate magnitude, phase and time shifted to the estimated position of the actual connection. The scaled/shifted response is then vectorially combined with the measured sweep data to suitably cancel the connection contribution to NEXT and/or Return Loss. Thus, the amount of NEXT or return loss existing in the user's patch cord is preserved, while the NEXT or return loss due to the instrument connection is suitably suppressed. Correction is done in the frequency domain, over the full bandwidth of the measured data.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: February 18, 2003
    Assignee: Microtest Inc.
    Inventors: James G. Tonti, James A. Patterson, James R. Sciacero
  • Publication number: 20020163340
    Abstract: The present invention provides methods for using time domain analysis of NEXT, Return Loss and the like, in conjunction with the application of time or distance referenced limits to verify and determine compliance of the performance requirements of connections in a typical link. Time domain analysis of NEXT, Return Loss data and the like, suitably provides the performance characteristics of a link as a function of time or distance. When coupled with time or distance performance curves for connections, it can be determined if the transmission fault is at a connection or in the cable. The time limit curves for connections can be generated based on the frequency domain performance requirements for connecting hardware of a specific level of performance. The connection time limit curves thus provide an interpretation means to determine if the connection is within performance standards, allowing improved isolation of the fault condition.
    Type: Application
    Filed: June 18, 2002
    Publication date: November 7, 2002
    Inventors: James R. Sciacero, James G. Tonti
  • Patent number: 6433558
    Abstract: The present invention provides methods for using time domain analysis of NEXT, Return Loss and the like, in conjunction with the application of time or distance referenced limits to verify and determine compliance of the performance requirements of connections in a typical link. Time domain analysis of NEXT, Return Loss data and the like, suitably provides the performance characteristics of a link as a function of time or distance. When coupled with time or distance performance curves for connections, it can be determined if the transmission fault is at a connection or in the cable. The time limit curves for connections can be generated based on the frequency domain performance requirements for connecting hardware of a specific level of performance. The connection time limit curves thus provide an interpretation means to determine if the connection is within performance standards, allowing improved isolation of the fault condition.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: August 13, 2002
    Assignee: Microtest, Inc.
    Inventors: James R. Sciacero, James G. Tonti
  • Patent number: 5539321
    Abstract: An instrument to measure crosstalk between conductor pairs is configured to transmit a signal at one pair and receive the signal at another pair. The spureous or parasitic crosstalk at the connectors is supressed using a vectorial substraction from the received signal.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: July 23, 1996
    Assignee: Microtest, Inc.
    Inventors: James R. Sciacero, John P. Hittel
  • Patent number: 5502391
    Abstract: Apparatus to measure the crosstalk between pairs of conductors in a cable. The measurements are affected by the crosstalk inherent to the connectors that are part of the apparatus. The improvement consists of adding a compensating signal which equals that from the connector crosstalk in magnitude but has opposite sign.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: March 26, 1996
    Assignee: MicroTest, Inc.
    Inventors: James R. Sciacero, John P. Hittel
  • Patent number: 5218174
    Abstract: A digitizing system includes a tablet and a cordless pointing device including a plurality of data grid conductors in the tablet and a plurality of clock grid conductors in the tablet, all receiving a magnetic field signal transmitted by the pointing device. A data channel circuit includes a differential amplifier and demodulating and filtering circuitry coupled to an output of the differential amplifier, having a clock input. An A/D converter has an input coupled to an output of the demodulating and filtering circuitry. Multiplexing circuitry selectively couples various grid conductor signals to the data channel circuit. A clock recovery circuit responsive to the clock grid conductors includes a phase-locked-loop circuit that generates a recovered clock signal which is synchronous with the magnetic field signal and is used as a reference for demodulating the phase and amplitude of signals multiplexed from the data grid conductors to the data channel circuit.
    Type: Grant
    Filed: October 1, 1991
    Date of Patent: June 8, 1993
    Assignee: Kurta Corporation
    Inventors: Donald F. Gray, James L. Rodgers, James R. Sciacero, Charles A. Waterbury
  • Patent number: 4859814
    Abstract: A digitizing system includes a differential noise reduction technique wherein spaced parallel grid conductors in a tablet are differentially sensed in order to cancel out locally induced noise signals. Grid conductors also are sensed in a single ended fashion to initially locate a grid conductor conducting a larger induced carrier signal amplitude than any other grid conductor and produce amplitude data that is used to eliminate ambiguities arising from differential sensing of pairs of spaced grid conductors.
    Type: Grant
    Filed: August 29, 1988
    Date of Patent: August 22, 1989
    Assignee: Kurta Corporation
    Inventors: James R. Sciacero, Charles A. Waterbury
  • Patent number: 4710767
    Abstract: A circuit is provided which receives pixel data and pixel addresses from a graphics processor and effectuates rapid clipping of image information lying outside of a corresponding window, and also provides a template memory for storing information corresponding to all areas of that window which are obscured by a higher priority window. The pixel addresses are simultaneously applied to an image memory, the template memory, and the window clipping circuit. A write control circuit enables a write signal produced by the graphics processor to be applied to a write input of the image memory only if the present pixel is located within the present window, as determined by the window clipping circuit, and is not in an obscured area of that window, as determined by the read-out of the template memory.
    Type: Grant
    Filed: July 19, 1985
    Date of Patent: December 1, 1987
    Assignee: Sanders Associates, Inc.
    Inventors: James R. Sciacero, Douglas L. Pardee