Abstract: An analog-to-digital converter includes: a N-tap ACT delay line for containing an injected analog signal, the N taps being spaced from one another along the delay line; means for generating a surface acoustic wave (SAW) into the delay line, wherein the SAW collects the injected signal into charge packets and transports the charge packets through the channel region of the delay line; N means for supplying N reference signals; N comparators, wherein the i-th comparator compares the output of the i-th tap with the i-th reference signal from the i-th reference signal means for generating an i-th bit for i=1, . . . , N; wherein V.sub.rf is the reference signal for the first comparator and wherein the m-th reference signal is determined from the value of the preceding (m-1) bits where m=2, . . . , N; and a shift register array for storing the N-bit output.