Patents by Inventor James Raymond Maliclic Baello
James Raymond Maliclic Baello has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230395471Abstract: A method comprises removing a portion of molding compound from a side of a package structure by a laser ablation process to create an opening that exposes a portion of a conductive clip, depositing solder paste on the exposed portion of the conductive clip, and reflowing the solder paste. The laser ablation process in one example is a pulsed laser ablation process that includes raster scanning a laser along a portion of the side of the package structure to create the opening. Depositing the solder paste in one example includes performing a dispense process or a screening process that deposits solder paste in the opening onto the exposed portion of the conductive clip.Type: ApplicationFiled: August 22, 2023Publication date: December 7, 2023Inventors: Laura May Antoinette Dela Paz Clemente, James Raymond Maliclic Baello
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Patent number: 11742266Abstract: A method comprises removing a portion of molding compound from a side of a package structure by a laser ablation process to create an opening that exposes a portion of a conductive clip, depositing solder paste on the exposed portion of the conductive clip, and reflowing the solder paste. The laser ablation process in one example is a pulsed laser ablation process that includes raster scanning a laser along a portion of the side of the package structure to create the opening. Depositing the solder paste in one example includes performing a dispense process or a screening process that deposits solder paste in the opening onto the exposed portion of the conductive clip.Type: GrantFiled: December 12, 2019Date of Patent: August 29, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Laura May Antoinette Dela Paz Clemente, James Raymond Maliclic Baello
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Publication number: 20230187223Abstract: A semiconductor package includes a leadframe forming a plurality of leads with a die attach site, a semiconductor die including a set of die contacts mounted to the die attach site in a flip chip configuration with each die contact of the set of die contacts electrically connected to leadframe via one of a set of solder joints, a set of solder joint capsules covering each of the set of solder joints against the leadframe, a clip mounted to the leadframe over the semiconductor die with a clip solder joint. The solder joint capsules restrict flow of the solder joints of the semiconductor die contacts in the flip chip configuration such that the solder remains in place if remelted during later clip solder reflow.Type: ApplicationFiled: February 8, 2023Publication date: June 15, 2023Inventors: James Raymond Maliclic Baello, Steffany Ann Lacierda Moreno
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Patent number: 11600498Abstract: A semiconductor package includes a leadframe forming a plurality of leads with a die attach site, a semiconductor die including a set of die contacts mounted to the die attach site in a flip chip configuration with each die contact of the set of die contacts electrically connected to leadframe via one of a set of solder joints, a set of solder joint capsules covering each of the set of solder joints against the leadframe, a clip mounted to the leadframe over the semiconductor die with a clip solder joint. The solder joint capsules restrict flow of the solder joints of the semiconductor die contacts in the flip chip configuration such that the solder remains in place if remelted during later clip solder reflow.Type: GrantFiled: December 31, 2019Date of Patent: March 7, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: James Raymond Maliclic Baello, Steffany Ann Lacierda Moreno
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Publication number: 20220396474Abstract: A semiconductor package includes a semiconductor die including terminals, a plurality of leads, at least some of the leads being electrically coupled to the terminals within the semiconductor package, a sensor on a surface of the semiconductor die, a set of metal columns on the surface of the semiconductor die, the set of metal columns forming a perimeter around the sensor on the surface of the semiconductor die, and a mold compound surrounding the semiconductor die except for an area inside the perimeter on the surface of the semiconductor die such that the sensor is exposed to ambient air.Type: ApplicationFiled: June 11, 2021Publication date: December 15, 2022Inventors: Rafael Jose Lizares Guevara, James Raymond Maliclic Baello
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Publication number: 20220122940Abstract: A semiconductor device assembly includes a package substrate having a top side including a plurality of bondable features, at least one integrated circuit (IC) die including a substrate having at least a semiconductor surface including circuitry configured for realizing at least one function including nodes coupled to bond pads with metal posts on the bond pads. The metal posts are attached by a solder joint to the bondable features. The solder joint has a void density of less than or equal to (?) 5% of a cross-sectional area of the solder joint.Type: ApplicationFiled: October 19, 2020Publication date: April 21, 2022Inventors: James Raymond Maliclic Baello, Steffany Ann Lacierda Moreno, Jose Carlos Arroyo
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Publication number: 20210202269Abstract: A semiconductor package includes a leadframe forming a plurality of leads with a die attach site, a semiconductor die including a set of die contacts mounted to the die attach site in a flip chip configuration with each die contact of the set of die contacts electrically connected to leadframe via one of a set of solder joints, a set of solder joint capsules covering each of the set of solder joints against the leadframe, a clip mounted to the leadframe over the semiconductor die with a clip solder joint. The solder joint capsules restrict flow of the solder joints of the semiconductor die contacts in the flip chip configuration such that the solder remains in place if remelted during later clip solder reflow.Type: ApplicationFiled: December 31, 2019Publication date: July 1, 2021Inventors: James Raymond Maliclic Baello, Steffany Ann Lacierda Moreno
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Publication number: 20210183751Abstract: A method comprises removing a portion of molding compound from a side of a package structure by a laser ablation process to create an opening that exposes a portion of a conductive clip, depositing solder paste on the exposed portion of the conductive clip, and reflowing the solder paste. The laser ablation process in one example is a pulsed laser ablation process that includes raster scanning a laser along a portion of the side of the package structure to create the opening. Depositing the solder paste in one example includes performing a dispense process or a screening process that deposits solder paste in the opening onto the exposed portion of the conductive clip.Type: ApplicationFiled: December 12, 2019Publication date: June 17, 2021Applicant: Texas Instruments IncorporatedInventors: Laura May Antoinette Dela Paz Clemente, James Raymond Maliclic Baello
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Patent number: 10593640Abstract: In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate.Type: GrantFiled: April 18, 2018Date of Patent: March 17, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: James Raymond Maliclic Baello, Rafael Jose Lizares Guevara
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Publication number: 20190326245Abstract: In a described example, an apparatus includes a semiconductor substrate and at least two pillar bumps formed on an active surface of the semiconductor substrate, the at least two pillar bumps extending away from the active surface and having ends spaced from the semiconductor substrate with solder material at the ends of the at least two pillar bumps. At least one spacer is formed on the active surface of the semiconductor substrate, the at least one spacer extending a predetermined distance from the active surface of the semiconductor substrate. A package substrate has a die mount area on a first surface including portions receiving the ends of the at least two pillar bumps and receiving an end of the at least one spacer. Mold compound covers the semiconductor substrate, the at least two pillars, the at least one spacer, and at least a portion of the semiconductor substrate.Type: ApplicationFiled: April 18, 2018Publication date: October 24, 2019Inventors: James Raymond Maliclic Baello, Rafael Jose Lizares Guevara
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Patent number: 9564410Abstract: A semiconductor device having a terminal site (100) including a flat pad (110) of a first metal covered by a layer (130) of dielectric material, the layer over the pad parallel to the pad and having a window of a first diameter (132) exposing the surface of the underlying pad. The terminal site further has a patch-shaped film (140) of a second metal covering the surface of the exposed first metal and the surface of an annulus of the dielectric layer framing the window, the film patch having a second diameter (141) greater than the first diameter; and a bump (150) of a third metal adhering to the film, the bump having a third diameter (151) smaller than the second diameter, whereby the film protrudes like a flange from the bump.Type: GrantFiled: July 8, 2015Date of Patent: February 7, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Floro Lopez Camenforte, III, James Raymond Maliclic Baello, Armando Tresvalles Clarina, Jr.
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Publication number: 20170012012Abstract: A semiconductor device having a terminal site (100) including a flat pad (110) of a first metal covered by a layer (130) of dielectric material, the layer over the pad parallel to the pad and having a window of a first diameter (132) exposing the surface of the underlying pad. The terminal site further has a patch-shaped film (140) of a second metal covering the surface of the exposed first metal and the surface of an annulus of the dielectric layer framing the window, the film patch having a second diameter (141) greater than the first diameter; and a bump (150) of a third metal adhering to the film, the bump having a third diameter (151) smaller than the second diameter, whereby the film protrudes like a flange from the bump.Type: ApplicationFiled: July 8, 2015Publication date: January 12, 2017Inventors: Floro Lopez Camenforte, III, James Raymond Maliclic Baello, Armando Tresvalles Clarina, JR.