Patents by Inventor James Reinders

James Reinders has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6535584
    Abstract: A method and apparatus are provided for reducing the number of cache line data transfers among components of a computer system, thus reducing the amount of traffic on a bus and increasing overall system performance. A sideband communication line is provided to transfer information from a source cache agent pertaining to redundant data strings occurring in a cache line to a destination cache agent. If redundant data strings occur in a cache line, the transfer of one or more portions of a cache line from the source to the destination can be canceled. Redundancy logic is provided to detect occurrences of redundant data strings located in a given cache line, generate and transfer redundancy bits when predetermined redundant data strings occur and decode redundancy bits at a destination cache agent to determine whether redundant data strings occur in subsequent cache lines to be transferred.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: March 18, 2003
    Assignee: Intel Corporation
    Inventor: James Reinders
  • Patent number: 6467000
    Abstract: A method and apparatus are provided for reducing the number of cache line data transfers among components of a computer system, thus reducing the amount of traffic on a bus and increasing overall system performance. A sideband communication line is provided to transfer information from a source cache agent pertaining to redundant data strings occurring in a cache line to a destination cache agent. If redundant data strings occur in a cache line, the transfer of one or more portions of a cache line from the source to the destination can be canceled. Redundancy logic is provided to detect occurrences of redundant data strings located in a given cache line, generate and transfer redundancy bits when predetermined redundant data strings occur and decode redundancy bits at a destination cache agent to determine whether redundant data strings occur in subsequent cache lines to be transferred.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: October 15, 2002
    Assignee: Intel Corporation
    Inventor: James Reinders
  • Patent number: 6044437
    Abstract: A method and apparatus are provided for reducing the number of cache line data transfers among components of a computer system, thus reducing the amount of traffic on a bus and increasing overall system performance. A sideband communication line is provided to transfer information from a source cache agent pertaining to redundant data strings occurring in a cache line to a destination cache agent. If redundant data strings occur in a cache line, the transfer of one or more portions of a cache line from the source to the destination can be canceled. Redundancy logic is provided to detect occurrences of redundant data strings located in a given cache line, generate and transfer redundancy bits when predetermined redundant data strings occur and decode redundancy bits at a destination cache agent to determine whether redundant data strings occur in subsequent cache lines to be transferred.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: March 28, 2000
    Assignee: Intel Corporation
    Inventor: James Reinders
  • Patent number: 5897660
    Abstract: The present invention overcomes the drawbacks of conventional operating system implementations of virtual to physical memory address mapping by providing a method for free physical page management and translation of virtual addresses to physical addresses that increases the effectiveness of the cache memory by reducing the thrashing caused by unfavorable mapping of virtual to physical addresses.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: April 27, 1999
    Assignee: Intel Corporation
    Inventors: James Reinders, Joe Bonasera