Patents by Inventor James Reinhard

James Reinhard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240056385
    Abstract: A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.
    Type: Application
    Filed: October 23, 2023
    Publication date: February 15, 2024
    Inventors: Abdulla M. Bataineh, Jonathan Paul Beecroft, Thomas L. Court, Anthony M. Ford, Edwin L. Froese, David Charles Hewson, Joseph Kopnick, Andrew Kopser, Duncan Roweth, Gregory Faanes, Michael Higgins, Timothy J. Johnson, Trevor Jones, James Reinhard, Edward J. Turner, Steven L. Scott
  • Patent number: 11818037
    Abstract: A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: November 14, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Abdulla M. Bataineh, Jonathan P. Beecroft, Thomas L. Court, Anthony M. Ford, Edwin L. Froese, David Charles Hewson, Joseph G. Kopnick, Andrew S. Kopser, Duncan Roweth, Gregory Faanes, Michael Higgins, Timothy J. Johnson, Trevor Jones, James Reinhard, Edward J. Turner, Steven L. Scott, Robert L. Alverson
  • Publication number: 20220210094
    Abstract: A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.
    Type: Application
    Filed: March 23, 2020
    Publication date: June 30, 2022
    Inventors: Abdulla M. Bataineh, Jonathan P. Beecroft, Thomas L. Court, Anthony M. Ford, Edwin L. Froese, David Charles Hewson, Joseph G. Kopnick, Andrew S. Kopser, Duncan Roweth, Gregory Faanes, Michael Higgins, Timothy J. Johnson, Trevor Jones, James Reinhard, Edward J. Turner, Steven L. Scott, Robert L. Alverson
  • Patent number: 9185034
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Igor Gorodetsky, Walter James Reinhard
  • Publication number: 20140314083
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Application
    Filed: February 18, 2014
    Publication date: October 23, 2014
    Inventors: Igor Gorodetsky, Walter James Reinhard
  • Patent number: 8677025
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: March 18, 2014
    Assignee: Intel Corporation
    Inventors: Igor Gorodetsky, Walter James Reinhard
  • Patent number: 8260969
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Intel Corporation
    Inventors: Igor Gorodetsky, Walter James Reinhard
  • Publication number: 20120203928
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Application
    Filed: April 19, 2012
    Publication date: August 9, 2012
    Inventors: Igor Gorodetsky, Walter James Reinhard
  • Publication number: 20100138562
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Application
    Filed: February 2, 2010
    Publication date: June 3, 2010
    Applicant: CRAY CANADA CORPORATION
    Inventors: Igor GORODETSKY, Walter James REINHARD
  • Patent number: 7685319
    Abstract: A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: March 23, 2010
    Assignee: Cray Canada Corporation
    Inventors: Igor Gorodetsky, Walter James Reinhard
  • Patent number: 7606933
    Abstract: A high performance computer system has a number of compute nodes interconnected by an inter-node communication network. Each compute node has a local packetized interconnect coupled to the inter-node communication network by an interface. Data packets on the local packetized interconnect of a sending node may be delivered to a destination in a receiving node by addressing them to addresses associated with the network interface and tunneling the packets through the inter-node communication network to the receiving node.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: October 20, 2009
    Assignee: Cray Canada Corporation
    Inventors: Walter James Reinhard, Igor Gorodetsky
  • Publication number: 20050132089
    Abstract: Compute nodes in a high performance computer system are interconnected by an inter-node communication network. Each compute node has a network interface coupled directly to a CPU by a dedicated full-duplex packetized interconnect. Data may be exchanged between compute nodes using eager or rendezvous protocols. The network interfaces may include facilities to manage data transfer between computer nodes.
    Type: Application
    Filed: March 1, 2004
    Publication date: June 16, 2005
    Applicant: Octigabay Systems Corporation
    Inventors: Kent Bodell, James Reinhard, Igor Gorodetsky, Josef Roehrl
  • Publication number: 20040254900
    Abstract: A parking citation (144) is disclosed, in relation to a vehicle (136) parked during a first time period in a parking space (108) associated with a parking meter (104), said citation comprising parking citation data (510) for the vehicle (136), and an automatically derived operational status (516) for the parking meter (104) during a time period in which a payment in respect of the first period could have been made, the operational status (516) on the citation (144) establishing whether the parking meter (104) was operative during the first time period. A method and a system for issuing the citation are also disclosed.
    Type: Application
    Filed: August 23, 2004
    Publication date: December 16, 2004
    Inventor: Sydney James Reinhard