Abstract: A video transport stream over IP (TS/IP) server system comprises a set of video server blocks. A video server block comprises a pair of codecs and a primary FPGA, the codecs based on a fully programmable high speed DSP processor. The video server block further comprises a pair of VioIP engines for translating transport streams into IP packet streams. The video TS/IP server can perform transcoding, transrating and statistical multiplexing functions between ingress and egress transport streams. The video TS/IP server can ingress or egress HD-SDI and DVB-ASI data streams to or from an IP network via TS/IP. A host subsystem is embedded in a stand-alone embodiment. Multiple video TS/IP servers can be hosted by a PC in a PC host embodiment.