Abstract: A multi-band phase lock loop (PLL) device for use in a communication system. The PLL comprises a frequency reference oscillator, a reference frequency divider, a phase and frequency detector, a filter and compensation circuit, a microcontroller, a multi-band voltage controlled oscillator (VCO), and a feedback divider. A fast feedback signal is provided to the VCO for phase locking operation. A slow feedback signal is used by the microcontroller to generate a frequency adjust signal for frequency band centering for the VCO. The microcontroller also controls the VCO to change the frequency band of operation. The PLL device may be used in a communication system that operate in both the cellular frequency band and the PCS frequency band.