Abstract: A comparator (10) operates in comparator mode or in static leakage current test mode as determined by a control signal. In the comparator mode, the comparator receives a differential input signal for amplification through an analog differential front-end comparator input stage (31). The output of the comparator input stage is presented as a single-ended signal that is applied to an input of a buffer (32). The buffer amplifies the single-ended signal to digital logic levels. In test mode, the control signal enables a feedback circuit (36-42) from the output of the buffer back to its input and disables the differential front-end comparator input stage by removing the power supply. The last valid data state present at the output of the buffer is thus latched back to its input to allow static leakage current testing of down-stream circuitry without interference from the comparator drawing large static currents.