Patents by Inventor James S. Clarke
James S. Clarke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240112952Abstract: A dielectric layer and a method of forming thereof. An opening defined in a dielectric layer and a wire deposited within the opening, wherein the wire includes a core material surrounded by a jacket material, wherein the jacket material exhibits a first resistivity ?1 and the core material exhibits a second resistivity ?2 and ?2 is less than ?1.Type: ApplicationFiled: December 11, 2023Publication date: April 4, 2024Inventors: Hui Jae YOO, Tejaswi K. INDUKURI, Ramanan V. CHEBIAM, James S. CLARKE
-
Patent number: 11942516Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate above the quantum well stack, wherein the first gate includes a first gate metal and a first gate dielectric; and a second gate above the quantum well stack, wherein the second gate includes a second gate metal and a second gate dielectric, and the first gate is at least partially between a portion of the second gate and the quantum well stack.Type: GrantFiled: March 25, 2022Date of Patent: March 26, 2024Assignee: Intel CorporationInventors: Nicole K. Thomas, Ravi Pillarisetty, Kanwaljit Singh, Hubert C. George, David J. Michalak, Lester Lampert, Zachary R. Yoscovits, Roman Caudillo, Jeanette M. Roberts, James S. Clarke
-
Patent number: 11922274Abstract: Quantum dot devices with three of more accumulation gates provided over a single row of a quantum dot formation region are disclosed. Each accumulation gate is electrically coupled to a respective doped region. In this manner, multiple single electron transistors (SETs) are provided along the row. Side and/or center screening gates may be used to apply microwave pulses for qubit control and to control electrostatics so that source and drain regions of the multiple SETs with quantum dots formed along the single row of a quantum dot formation region are sufficiently isolated from one another. Such quantum dot devices provide strong spatial localization of the quantum dots, good control over quantum dot interactions and manipulation, good scalability in the number of quantum dots included in the device, and/or design flexibility in making electrical connections to the quantum dot devices to integrate the quantum dot devices in larger computing devices.Type: GrantFiled: May 18, 2021Date of Patent: March 5, 2024Assignee: Intel CorporationInventors: Hubert C. George, James S. Clarke, Ravi Pillarisetty, Brennen Karl Mueller, Stephanie A. Bojarski, Eric M. Henry, Roza Kotlyar, Thomas Francis Watson, Lester Lampert, Samuel Frederick Neyens
-
Patent number: 11881432Abstract: A dielectric layer and a method of forming thereof. An opening defined in a dielectric layer and a wire deposited within the opening, wherein the wire includes a core material surrounded by a jacket material, wherein the jacket material exhibits a first resistivity ?1 and the core material exhibits a second resistivity ?2 and ?2 is less than ?1.Type: GrantFiled: December 23, 2022Date of Patent: January 23, 2024Inventors: Hui Jae Yoo, Tejaswi K. Indukuri, Ramanan V. Chebiam, James S. Clarke
-
Patent number: 11749721Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a first gate and an adjacent second gate above the quantum well stack; and a gate wall between the first gate and the second gate, wherein the gate wall includes a spacer and a capping material, the spacer has a top and a bottom, the bottom of the spacer is between the top of the spacer and the quantum well stack, and the capping material is proximate to the top of the spacer.Type: GrantFiled: September 28, 2018Date of Patent: September 5, 2023Assignee: Intel CorporationInventors: Hubert C. George, Ravi Pillarisetty, Lester Lampert, James S. Clarke, Nicole K. Thomas, Roman Caudillo, David J. Michalak, Jeanette M. Roberts
-
Publication number: 20230275087Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.Type: ApplicationFiled: May 3, 2023Publication date: August 31, 2023Applicant: Intel CorporationInventors: James S. Clarke, Nicole K. Thomas, Zachary R. Yoscovits, Hubert C. George, Jeanette M. Roberts, Ravi Pillarisetty
-
Publication number: 20230263076Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate and a quantum well stack disposed on the substrate. The quantum well stack may include a quantum well layer and a back gate, and the back gate may be disposed between the quantum well layer and the substrate.Type: ApplicationFiled: April 17, 2023Publication date: August 17, 2023Applicant: Intel CorporationInventors: Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Zachary R. Yoscovits, James S. Clarke, Van H. Le
-
Patent number: 11721723Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gate lines above the quantum well stack; a plurality of second gate lines above the quantum well stack, wherein the second gate lines are perpendicular to the first gate lines; and an array of regularly spaced magnet lines.Type: GrantFiled: May 14, 2021Date of Patent: August 8, 2023Assignees: Intel Corporation, Technische Universiteit DelftInventors: Kanwaljit Singh, James S. Clarke, Menno Veldhorst, Lieven Mark Koenraad Vandersypen
-
Patent number: 11721748Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack having a first face and a second opposing face; an array of parallel first gate lines at the first face or the second face of the quantum well stack; and an array of parallel second gate lines at the first face or the second face of the quantum well stack, wherein the second gate lines are oriented diagonal to the first gate lines.Type: GrantFiled: June 8, 2021Date of Patent: August 8, 2023Assignees: Intel Corporation, Technische Universiteit DelftInventors: Kanwaljit Singh, James S. Clarke, Menno Veldhorst, Lieven Mark Koenraad Vandersypen
-
Patent number: 11721737Abstract: Disclosed herein are quantum dot devices with trenched substrates, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate having a trench disposed therein, wherein a bottom of the trench is provided by a first material, and a quantum well stack at least partially disposed in the trench. A material of the quantum well stack may be in contact with the bottom of the trench, and the material of the quantum well stack may be different from the first material.Type: GrantFiled: August 13, 2021Date of Patent: August 8, 2023Assignee: Intel CorporationInventors: Ravi Pillarisetty, Van H. Le, Jeanette M. Roberts, David J. Michalak, James S. Clarke, Zachary R. Yoscovits
-
Patent number: 11721724Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer, wherein the quantum well layer includes an isotopically purified material; a gate dielectric above the quantum well stack; and a gate metal above the gate dielectric, wherein the gate dielectric is between the quantum well layer and the gate metal.Type: GrantFiled: July 1, 2021Date of Patent: August 8, 2023Assignee: Intel CorporationInventors: Nicole K. Thomas, James S. Clarke, Jessica M. Torres, Ravi Pillarisetty, Kanwaljit Singh, Payam Amin, Hubert C. George, Jeanette M. Roberts, Roman Caudillo, David J. Michalak, Zachary R. Yoscovits, Lester Lampert
-
Patent number: 11721725Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gate lines above the quantum well stack; a plurality of second gate lines above the quantum well stack, wherein the second gate lines are perpendicular to the first gate lines; and an array of regularly spaced magnet lines.Type: GrantFiled: February 24, 2022Date of Patent: August 8, 2023Assignees: Intel Corporation, Technische Universiteit DelftInventors: Kanwaljit Singh, James S. Clarke, Menno Veldhorst, Lieven Mark Koenraad Vandersypen
-
Patent number: 11699747Abstract: Disclosed herein are quantum dot devices with multiple layers of gate metal, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; an insulating material above the quantum well stack, wherein the insulating material includes a trench; and a gate on the insulating material and extending into the trench, wherein the gate includes a first gate metal in the trench and a second gate metal above the first gate metal.Type: GrantFiled: March 26, 2019Date of Patent: July 11, 2023Assignee: Intel CorporationInventors: Hubert C. George, Sarah Atanasov, Ravi Pillarisetty, Lester Lampert, James S. Clarke, Nicole K. Thomas, Roman Caudillo, Kanwaljit Singh, David J. Michalak, Jeanette M. Roberts, Stephanie A. Bojarski
-
Patent number: 11700776Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate and a quantum well stack disposed on the substrate. The quantum well stack may include a quantum well layer and a back gate, and the back gate may be disposed between the quantum well layer and the substrate.Type: GrantFiled: February 4, 2022Date of Patent: July 11, 2023Assignee: Intel CorporationInventors: Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Zachary R. Yoscovits, James S. Clarke, Van H. Le
-
Publication number: 20230210023Abstract: Technologies for radiofrequency optimized interconnects for a quantum processor are disclosed. In the illustrative embodiment, signals are carried in coplanar waveguides on a surface of a quantum processor die. A ground ring surrounds the signals and is connected to the ground conductors of each coplanar waveguide. Wire bonds connect the ground ring to a ground of a circuit board. The wire bonds provide both an electrical connection from the quantum processor die to the circuit board as well as increased thermal coupling between the quantum processor die and the circuit board, increasing cooling of the quantum processor die.Type: ApplicationFiled: December 23, 2021Publication date: June 29, 2023Applicant: Intel CorporationInventors: Hubert C. George, Ravi Pillarisetty, JongSeok Park, Stefano Pellerano, Lester F. Lampert, Thomas F. Watson, Florian Luthi, James S. Clarke
-
Patent number: 11688735Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.Type: GrantFiled: June 8, 2021Date of Patent: June 27, 2023Inventors: James S. Clarke, Nicole K. Thomas, Zachary R. Yoscovits, Hubert C. George, Jeanette M. Roberts, Ravi Pillarisetty
-
Publication number: 20230197833Abstract: Quantum dot devices and related methods and systems that use semiconductor nanoribbons arranged in a grid where a plurality of first nanoribbons, substantially parallel to one another, intersect a plurality of second nanoribbons, also substantially parallel to one another but at an angle with respect to the first nanoribbons, are disclosed. Different gates at least partially wrap around individual portions of the first and second nanoribbons, and at least some of the gates are provided at intersections of the first and second nanoribbons. Unlike previous approaches to quantum dot formation and manipulation, nanoribbon-based quantum dot devices provide strong spatial localization of the quantum dots, good scalability in the number of quantum dots included in the device, and/or design flexibility in making electrical connections to the quantum dot devices to integrate the quantum dot devices in larger computing devices.Type: ApplicationFiled: December 21, 2021Publication date: June 22, 2023Applicant: Intel CorporationInventors: Nicole K. Thomas, Payam Amin, Ravi Pillarisetty, Hubert C. George, James S. Clarke
-
Patent number: 11682701Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack and a plurality of linear arrays of gates above the quantum well stack to control quantum dot formation in the quantum well stack. An insulating material may be between a first linear array of gates and a second linear array of gates, the insulating material may be between individual gates in the first linear array of gates, and gate metal of the first linear array of gates may extend over the insulating material.Type: GrantFiled: March 27, 2019Date of Patent: June 20, 2023Assignee: Intel CorporationInventors: Stephanie A. Bojarski, Hubert C. George, Sarah Atanasov, Nicole K. Thomas, Ravi Pillarisetty, Lester Lampert, Thomas Francis Watson, David J. Michalak, Roman Caudillo, Jeanette M. Roberts, James S. Clarke
-
Patent number: 11677017Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include a (111) silicon substrate, a (111) germanium quantum well layer above the substrate, and a plurality of gates above the quantum well layer. In some embodiments, a quantum dot device may include a silicon substrate, an insulating material above the silicon substrate, a quantum well layer above the insulating material, and a plurality of gates above the quantum well layer.Type: GrantFiled: September 10, 2021Date of Patent: June 13, 2023Assignee: Intel CorporationInventors: Ravi Pillarisetty, Van H. Le, Nicole K. Thomas, Hubert C. George, Jeanette M. Roberts, Payam Amin, Zachary R. Yoscovits, Roman Caudillo, James S. Clarke, Roza Kotlyar, Kanwaljit Singh
-
Patent number: 11664421Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; an insulating material disposed above the quantum well stack, wherein the insulating material includes a trench; and a gate metal disposed on the insulating material and extending into the trench.Type: GrantFiled: August 7, 2020Date of Patent: May 30, 2023Assignee: Intel CorporationInventors: Hubert C. George, Ravi Pillarisetty, Jeanette M. Roberts, Nicole K. Thomas, James S. Clarke