Abstract: Guest memory data structures are read by one or more read operations which are set up to handle page faults and general protection faults generated during the read in various ways. If such a fault occurs while performing the one or more read operations, the fault is handled and the one or more read operation is terminated. The fault is handled by either dropping the fault and reporting an error instead of the fault, by dropping the fault and invoking an error handler that is set up prior to performing the read operations, or by forwarding the fault to a fault handler that is setup prior to performing the read operations. If no fault occurs, the read operations complete successfully. Thus, under normal circumstances, no fault is incurred in a read operation on guest memory data structures.

Abstract: A hypervisor provides a guest operating system with a plurality of protection domains, including a root protection domain and one or more secure protection domains, and mechanisms for controlling the transitions between the protection domains. The guest physical memory region of a secure protection domain, which is mapped to host physical memory by secure nested page tables, stores secure guest code and data, and guest page tables for the secure guest code. When executing secure guest code, the guest page tables stored in the secure protection domain region are used for guest virtual to guest physical address translations, and the secure nested page tables are used for guest physical to host physical address translations.

Abstract: Guest memory data structures are read by one or more read operations which are set up to handle page faults and general protection faults generated during the read in various ways. If such a fault occurs while performing the one or more read operations, the fault is handled and the one or more read operation is terminated. The fault is handled by either dropping the fault and reporting an error instead of the fault, by dropping the fault and invoking an error handler that is set up prior to performing the read operations, or by forwarding the fault to a fault handler that is setup prior to performing the read operations. If no fault occurs, the read operations complete successfully. Thus, under normal circumstances, no fault is incurred in a read operation on guest memory data structures.

Abstract: A hypervisor provides a guest operating system with a plurality of protection domains, including a root protection domain and one or more secure protection domains, and mechanisms for controlling the transitions between the protection domains. The guest physical memory region of a secure protection domain, which is mapped to host physical memory by secure nested page tables, stores secure guest code and data, and guest page tables for the secure guest code. When executing secure guest code, the guest page tables stored in the secure protection domain region are used for guest virtual to guest physical address translations, and the secure nested page tables are used for guest physical to host physical address translations.

Abstract: The inventive system and method is directed toward verifying the accuracy of data tables specified by a developer to be used by a program. The system searches through an application program for instructions which access areas of memory declared by the developer as being of interest and executes instrumentation code for these instructions. Input to the program is the source code of a user program and optionally, a data coverage specification prepared by a developer. Instrumentation can be implemented by inserting instrumenting code into the source code prior to compilation using facilities within the compiler itself. Alternatively, the instrumentation code can be added to the executable program code after compilation is complete. Yet a third option involves generating and executing instrumentation during execution of the user program without ever modifying the user program code at any stage.

Abstract: A computer-implemented system, method, and product are provided for multi-branch backpatching in a dynamic translator. Such backpatching typically increases the speed of execution of translated instructions by providing a direct control path from translated multi-branch-jump instructions to their translated target instructions. In one embodiment, the multi-branch backpatching dynamic translator undertakes backpatching on an “as-needed” basis at run time. That is, backpatching is done for those branch targets that are executed rather than for all branch targets, or rather than for those branch targets that are estimated or assumed will be executed. Such backpatching is accomplished in one embodiment by generating dynamic backpatching code specific to each translated multi-branch-jump instruction. A multi-branch jump, or switch, table of each multi-branch-jump instruction is initialized so that all entries direct control to the dynamic backpatching code for that instruction.

Abstract: A system and method are described for providing optimization for software inter-module procedure calls. The system provides for a program linker to translate a non-executable program into a computer program. The program linker also creates an import stub when the program linker encounters a call instruction to an unresolved module in the computer program. The program linker further modifies the call instruction to the unresolved module to be a call instruction to the created import stub. The import stub determines a location of the unresolved module a first time the unresolved module is called. The import stub then modifies the call instruction to the unresolved module the first time the unresolved module is called to be a direct call the unresolved module at the location determined after the first time the unresolved module is called.

Abstract: The present invention is a system, method, and product for improving the speed of dynamic translation systems by efficiently positioning translated instructions in a computer memory unit. More specifically, the speed of execution of translated instructions, which is a factor of particular relevance to dynamic optimization systems, may be adversely affected by inefficient jumping between traces of translated instructions. The present invention efficiently positions the traces with respect to each other and with respect to “trampoline” instructions that redirect control flow from the traces. For example, trampoline instructions may redirect control flow to an instruction emulator if the target instruction has not been translated, or to the translation of a target instruction that has been translated. When a target instruction has been translated, a backpatcher of the invention may directly backpatch the jump to the target so that the trampoline instructions are no longer needed.

Abstract: A run-time optimization strategy uses a trace picker to identify traces of program code in a native code pool, and a translator to translate the traces into a code cache where the traces are executed natively. Static branch prediction hints are encoded in branch instruction in the translated traces. A program module implementing the present invention is initialized with an empty code cache and a pool of instruction in a native code pool. The trace picker analyzes the instructions in the native code pool and identifies traces of instructions that tend to be executed as a group. When a trace is identified, basic blocks lying along the trace path are translated into a code cache, with static branch predictions encoded into the branch instructions of the basic blocks based on branching behavior observed when the trace is identified.

Abstract: A computer-implemented system, method, and product are provided to designate and translate traces of original instructions of an executable file at run time based on dynamic evaluation of control flow through frequently executed traces of instructions. Such designation typically reduces unnecessary translations and optimizations, and thereby increases execution speed and reduces the usage of memory and other resources. The invention includes a hot trace identifier to identify frequently executed traces of instructions and a hot trace instrumenter to instrument such frequently executed traces so that control flow through them may be recorded. If the amount or rate of control flow through a frequently executed trace exceeds a threshold value, a hot trace selector is invoked to select a hot trace of original instructions including those of the frequently executed trace. The hot trace may be dynamically optimized.

Abstract: A method and apparatus for improving the process of software development by a dynamic software development tool. The present invention efficiently executes in a user process and provides software developers with a high performance tool for software optimization. The present invention may augment the user process code instructions at runtime and, for every series of machine instructions that the original user source code would have executed, a series of instructions may be executed that are semantically equivalent to the user process code instructions and are altered to optimize the user process code instructions. The present invention may use emulation or translation to alter the user process code instructions. The resulting process is executed in the user process space and advantageously maintains the original flow of instruction execution. The present invention employs a technique of dynamically translating code at runtime and may operate on a virtual machine or a hardware machine.

Abstract: A computer-implemented system and method are provided to designate traces of original instructions of an executable file at run time based on evaluations of control flow through jump instructions. Such designation typically increases the opportunities for dynamic optimization based on loop unrolling and other modifications of the control-flow structure of the executable file. The target of a jump instruction is designated as the start of a trace if the number of times that control has passed to it through any one or more jump instructions of a predetermined type of jump instruction reaches a predetermined start-trace threshold. The trace is ended if the number of times that control has passed through jump instructions of one of a variety of particular types of jump instructions reaches an end-trace threshold that is predetermined for each such type of jump instruction. The invention includes an instruction emulator, a start-end designator, a trace translator and optimizer, and a backpatch manager.

Abstract: A method and apparatus varies branch prediction strategy associated with branch instructions in a trace of program code. The present invention first profiles branch instructions within a trace to record branching behavior. Next, the present invention partitions branch instructions into groups of branch instructions that can be statically predicted and groups of branch instructions that can be dynamically predicted. Branch instructions that are profiled to have "strong" branching behavior (e.g., the same branch direction is taken 80% of the time) are placed in the group of branch instruction that are statically predicted. Branch instructions that are profiled to have "weak" branching behavior (e.g., the same branch direction is taken 60% of the time) are placed in the group of branch instruction that are dynamically predicted. Finally, branch instructions are adjusted by associating an indication of prediction strategy with each profiled branch instruction.

Abstract: There is disclosed a dynamic cache which is divided into sections, or chunks, for the storage of optimized code. The optimized code may contain pointers to code in other chunks. When a cache chunk is to be reused, then the pointers to other caches, as well as the pointers from other caches to code contained with the cache that is to be removed, are changed to point to either code contained in a victim chunk of the cache, or, alternatively, to point back to the translator. The system can dynamically change the number and size of the cache chunks and the number and size of the victim chunks, if any.

Abstract: The invention relates to a method and apparatus for stack frame elimination for simple procedures with tail calls. Subject to certain prerequisite constraints, the invention modifies the procedure by converting all tail calls to direct branches. The code in the computer program for constructing and deconstructing the stack frame is eliminated. In a preferred embodiment of the invention, dead code elimination is performed on unreachable code. In an alternative, equally preferred embodiment, dead code is retained in the computer program.

Abstract: A method for operating a computer to allow the running of a source program written for a first computer on a second computer. The second computer is assumed to include a branch taken trap. The method defines a plurality of collection points in the source program. A trap handling routine is supplied for processing traps. The trap handling routine determines whether execution has halted because of a branch taken trap at one of the collection points, and if so, retrieves information identifying an event from a queue and transferring the information and control to a handler in the source code. If execution has halted because of a branch taken trap at a location other than one of the collection points, execution of the source program is resumed with the branch taken trap armed. If execution has halted because of an asynchronous event, information specifying the event is stored in the queue, the branch taken trap is armed, and execution of the source program is resumed at the point at which execution was halted.

Abstract: A method and apparatus for improving the process of software development by a dynamic software development tool. The present invention allows the execution of an emulation tool to occur under the control of the original user process and preserves the execution flow of the user process instructions. The present invention manages the execution of the emulation tool within the computer memory. The present invention uses the user process code as data to direct the execution of the emulation tool. The present invention enables the use of other software development tools such as monitoring and profiling tools, program analysis tools, simulation tools, and software debugging tools.