Patents by Inventor James Sellers

James Sellers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8021947
    Abstract: In one embodiment, a method for forming a transistor having insulated gate electrodes and insulated shield electrodes within trench regions includes forming disposable dielectric stack overlying a substrate. The method also includes forming the trench regions adjacent to the disposable dielectric stack. After the insulated gate electrodes are formed, the method includes removing the disposable dielectric stack, and then forming spacers adjacent the insulated gate electrodes. The method further includes using the spacers to form recessed regions in the insulated gate electrodes and the substrate, and then forming enhancement regions in the first and second recessed regions.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: September 20, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Gordon M. Grivna, James Sellers, Prasad Venkatraman
  • Publication number: 20110136309
    Abstract: In one embodiment, a method for forming a transistor having insulated gate electrodes and insulated shield electrodes within trench regions includes forming disposable dielectric stack overlying a substrate. The method also includes forming the trench regions adjacent to the disposable dielectric stack. After the insulated gate electrodes are formed, the method includes removing the disposable dielectric stack, and then forming spacers adjacent the insulated gate electrodes. The method further includes using the spacers to form recessed regions in the insulated gate electrodes and the substrate, and then forming enhancement regions in the first and second recessed regions.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 9, 2011
    Inventors: Gordon M. Grivna, James Sellers, Prasad Venkatraman
  • Publication number: 20100072544
    Abstract: In one embodiment, an MOS transistor is formed to have an active region and a termination region. Within the termination region a plurality of conductors are formed to make electrical contact to conductors that are within a plurality of trenches. The plurality of conductors in the termination region are formed to be substantially coplanar.
    Type: Application
    Filed: September 24, 2008
    Publication date: March 25, 2010
    Inventors: Jeffrey Pearse, Prasad Venkatraman, James Sellers, Hemanshu D. Bhatt
  • Publication number: 20070297946
    Abstract: A slide cartridge for use with a chemical analyzer includes an upper ring and a lower ring secured together but rotatable with respect to each other. The upper and lower rings define a plurality of reaction chambers between them, which receive dry analyte test slides. A gear track formed in the underside of the lower ring engages a pinion gear attached to a stepping motor of the chemical analyzer in order to rotate the slide cartridge. The slide cartridge is rotated under a sample fluid metering device, which deposits a sample fluid on the test slides through a plurality of spotter ports formed in the upper ring, and above a reflectometer, which performs a colorimetric measurement on the spotted test slides through viewing windows formed in the lower ring of the slide cartridge. A chemical analyzer with which the slide cartridge may be used includes a reflectometer, a sample fluid metering device and a stepping motor for rotating the slide cartridge.
    Type: Application
    Filed: August 28, 2007
    Publication date: December 27, 2007
    Inventors: James Sellers, Haydn Taylor, Lawrence Kuba
  • Publication number: 20070113473
    Abstract: A circular ring for retaining landscape materials around the base of trees, shrubs or other objects is presented having a flat, flexible bottom and a detachable, single vertical side wall around the outer periphery. The side wall is held in place around the periphery of the bottom piece by a plurality of securing tabs that extend below the bottom side of the side wall. The plurality of pointed securing tabs is inserted into and through a matching plurality of small slits in a circular pattern around the bottom's periphery. An arc-shaped slit is cut into the upper mid-section of the securing tab to provide a retaining flap. Notches are placed into the upper corners of the securing tabs to effectively lock the side wall to the base once the securing tabs are inserted. Once inserted, the securing tabs are bent by the user to further secure the side wall to the circular base.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 24, 2007
    Inventors: James Sellers, James Murray
  • Publication number: 20050171477
    Abstract: An auto-injector for rapid delivery of a bolus of injectable medication has a generally flat, sealed housing with small peripheral dimensions, approximating those of a credit card. A syringe, configured to be contained within the flat housing is pre-filled with the medication. The housing contains a mechanism that, when triggered, automatically drives the syringe and needle forwardly to an injection position and then continues to compress the volume of the syringe to effect rapid injection. The forward injection end of the device includes an actuator that also conceals and protects the needle at all times and, prevents post-injection hazards. The flat faces of the device have graphic symbols and other visual indicia relating to the operation and condition of the device. The device enables a simple three-step operation that reduces the risk of improper use.
    Type: Application
    Filed: March 24, 2005
    Publication date: August 4, 2005
    Applicant: Seedlings Life Science Ventures
    Inventors: Keith Rubin, James Sellers, Haydn Taylor
  • Publication number: 20050149997
    Abstract: A novel method of generating a sterile marine organism is disclosed. The method of generating sterile wild type and transgenic marine organisms having triploid genomes is also disclosed. Specifically, we disclose methods of inducing sterility in a number of fish and other species such that their progeny cannot produce offspring by breeding organisms with tetraploid genomes to organisms with diploid genomes to produce triploid offspring.
    Type: Application
    Filed: November 4, 2004
    Publication date: July 7, 2005
    Inventors: Benjamin Wolozin, James Sellers
  • Publication number: 20050036911
    Abstract: A slide cartridge for use with a chemical analyzer includes an upper ring and a lower ring secured together but rotatable with respect to each other. The upper and lower rings define a plurality of reaction chambers between them, which receive dry analyte test slides. A gear track formed in the underside of the lower ring engages a pinion gear attached to a stepping motor of the chemical analyzer in order to rotate the slide cartridge. The slide cartridge is rotated under a sample fluid metering device, which deposits a sample fluid on the test slides through a plurality of spotter ports formed in the upper ring, and above a reflectometer, which performs a colorimetric measurement on the spotted test slides through viewing windows formed in the lower ring of the slide cartridge. A chemical analyzer with which the slide cartridge may be used includes a reflectometer, a sample fluid metering device and a stepping motor for rotating the slide cartridge.
    Type: Application
    Filed: August 12, 2003
    Publication date: February 17, 2005
    Inventors: James Sellers, Haydn Taylor, Lawrence Kuba
  • Patent number: 5413952
    Abstract: A method for forming a direct wafer bonded structure having a buried high temperature metal nitride layer (16) and improved thermal conductivity is provided. By patterning the high temperature metal nitride layer (16) with a non-oxidizing photoresist stripper and absent a photoresist hardening step, adhesion between the high temperature metal nitride layer (16) and a dielectric layer (17, 27) subsequently formed over the high temperature metal nitride layer (16) is significantly improved. The dielectric layer (17, 27) will adhere to the high temperature metal nitride layer (16) in high temperature environments. In addition, a direct wafer bonded structure having a buried high temperature metal nitride layer (16) and improved thermal conductivity is provided. The structure is suitable for power, logic, and high frequency integrated circuit devices.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: May 9, 1995
    Assignee: Motorola, Inc.
    Inventors: Irenee Pages, Francesco D'Aragona, James A. Sellers, Raymond C. Wells
  • Patent number: 5407866
    Abstract: A method for forming a dielectric layer (16) on a high temperature metal layer (14) is provided. By processing the high temperature metal layer (14) with a non-oxidizing photoresist stripper and absent a photoresist hardening step, adhesion between the high temperature metal layer (14) and a dielectric layer (16) subsequently formed on the high temperature metal layer (14) is significantly improved. The dielectric layer (16) will adhere to the high temperature metal layer (14) in high temperature environments. The method is suitable for forming multi-layer metallization and buried layer structures for semiconductor integrated circuits.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: April 18, 1995
    Assignee: Motorola, Inc.
    Inventor: James A. Sellers
  • Patent number: 4943539
    Abstract: A method for forming a via contact for devices having multilayer metallization is provided wherein a sacrificial layer is formed over a bottom interconnect layer, and an interlayer dielectric is formed on the sacrificial layer. A via is etched in the interlayer dielectric, exposing the sacrificial layer. The sacrificial layer is isotropically etched to expose an area of the interconnect metal that is larger than the area of the via and a via metallization is selectively formed on the interconnect metal by chemical vapor deposition so that the via, including a void created by the isotropic etch of the sacrificial layer, is filled with the via metallization, thereby providing a contact area to the bottom interconnect metal which is larger than the via metallization itself.
    Type: Grant
    Filed: May 9, 1989
    Date of Patent: July 24, 1990
    Assignee: Motorola, Inc.
    Inventors: Syd R. Wilson, James A. Sellers, Robert J. Mattox