Patents by Inventor James Spallas

James Spallas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230326704
    Abstract: A miniature electron beam column in combination with magnetostatic lenses to produce very high-performance miniature electron or ion beam columns. Silicon-based electron optical components provide high-accuracy formation and alignment of critical optical elements and the magnetic lenses provide low-aberration focusing or condensing elements. Accurate assembly of the silicon and magnetic components is achievable via the multilayered assembly techniques and allows for achieving high performance.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Applicant: KLA Corporation
    Inventors: Lawrence Muray, John Gerling, James Spallas, Alan Brodie
  • Patent number: 11699607
    Abstract: A segmented detector device with backside illumination. The detector is able to collect and differentiate between secondary electrons and backscatter electrons. The detector includes a through-hole for passage of a primary electron beam. After hitting a sample, the reflected secondary and backscatter electrons are collected via a vertical structure having a P+/P?/N+ or an N+/N?/P+ composition for full depletion through the thickness of the device. The active area of the device is segmented using field isolation insulators located on the front side of the device.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: July 11, 2023
    Assignee: KLA Corporation
    Inventors: John Gerling, Lawrence Muray, Alan Brodie, James Spallas, Marcel Trimpl
  • Publication number: 20220399220
    Abstract: A segmented detector device with backside illumination. The detector is able to collect and differentiate between secondary electrons and backscatter electrons. The detector includes a through-hole for passage of a primary electron beam. After hitting a sample, the reflected secondary and backscatter electrons are collected via a vertical structure having a P+/P?/N+ or an N+/N?/P+ composition for full depletion through the thickness of the device. The active area of the device is segmented using field isolation insulators located on the front side of the device.
    Type: Application
    Filed: September 23, 2021
    Publication date: December 15, 2022
    Applicant: KLA Corporation
    Inventors: John Gerling, Lawrence Muray, Alan Brodie, James Spallas, Marcel Trimpl
  • Patent number: 8003952
    Abstract: A charged particle beam column package includes an assembly (e.g., comprising a plurality of layers, which can have a component coupled to one of the layers), and at least one deflector between an extractor and aperture of the assembly. Further, at least one of the layers has interconnects thereon.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: August 23, 2011
    Assignee: Agilent Technologies, Inc.
    Inventors: Lawrence P. Muray, James Spallas, Charles Silver
  • Publication number: 20080217531
    Abstract: A charged particle beam column package includes an assembly (e.g., comprising a plurality of layers, which can have a component coupled to one of the layers), and at least one deflector between an extractor and aperture of the assembly. Further, at least one of the layers has interconnects thereon.
    Type: Application
    Filed: August 30, 2007
    Publication date: September 11, 2008
    Inventors: Lawrence P. Muray, James Spallas, Charles Silver
  • Publication number: 20080054180
    Abstract: A charged particle beam column package includes an assembly (e.g., comprising a plurality of layers, which can have a component coupled to one of the layers), and a solid state detector coupled to the assembly. Further, at least one of the layers has interconnects thereon.
    Type: Application
    Filed: May 21, 2007
    Publication date: March 6, 2008
    Inventors: Charles Silver, Lawrence Muray, James Spallas
  • Patent number: 7335895
    Abstract: A micro-electrical system, such as a lens stack for use in a scanning electron microscope, analysis tool, etc., comprises recesses and/or serrations that increase the surface path breakdown, thereby increasing reliability and enabling high voltage operations.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: February 26, 2008
    Assignee: Novelx, Inc.
    Inventors: James Spallas, Lawrence Muray
  • Patent number: 7332729
    Abstract: A beam column array included alignment marks within to enable alignment of beams with respect to each other. Specifically, the array includes an array of beam columns, each column having at least once lens. A plurality of alignment marks are located beneath the lens. A method of using the array includes: scanning a plurality of beams in a beam column array over a plurality of alignment marks; and determining beam centroid positions of the beams with respect to each other based on data from the scanning.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: February 19, 2008
    Assignee: Novelx, Inc.
    Inventors: Lawrence Muray, James Spallas
  • Patent number: 7111382
    Abstract: Methods are provided for forming current perpendicular to the plane thin film read heads. In one embodiment, the method comprises the steps of forming a lower sensor lead, forming a lower sensor lead cladding of a low sputter yield material on the lower sensor lead, forming a sensor element on the lower sensor lead cladding, and forming an upper sensor lead coupled to the sensor element. The low sputter yield material helps to reduce redeposition of the lower sensor lead material onto side walls of the sensor element as the sensor element is being formed.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: September 26, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 7109486
    Abstract: An electron beam column package comprises a plurality of layers having components, such as lenses, coupled thereto. The layers may be made of LTCC, HTCC or other layer technology.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: September 19, 2006
    Assignee: Novelx, Inc.
    Inventors: James Spallas, Lawrence Muray
  • Patent number: 7045794
    Abstract: A micro-electrical system, such as a lens stack for use in a scanning electron microscope, analysis tool, etc., comprises recesses and/or serrations that increase the surface path breakdown, thereby increasing reliability and enabling high voltage operations.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: May 16, 2006
    Assignee: Novelx, Inc.
    Inventors: James Spallas, Lawrence Muray
  • Patent number: 6833979
    Abstract: The present invention provides an improved current perpendicular to the plane thin film read head device and method of fabrication. With the present invention, the lower lead is formed to inhibit accumulation of redeposited lead material on CPP sensor element side walls during CPP sensor formation. In the preferred embodiment, the upper portion of the lower lead, which normally is etched during sensor element formation, is formed of a low sputter yield material to reduce redeposition flux to the sensor side walls. It is also preferred to form the upper portion of a material that also has a low value for the ratio of its sputter yield at the lead milling angle-to-its sputter yield at the side wall milling angle to inhibit redeposition accumulation on the side wall. It is preferred to clad conventional lead material with a low sputter yield ratio, low resistivity material, to inhibit side wall redeposition accumulation while also providing a low resistance lower lead.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: December 21, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 6735850
    Abstract: The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: May 18, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Matthew Gibbons, Kenneth E. Knapp, Ronald A. Barr, Benjamin P. Law, James Spallas, Ming Zhao
  • Patent number: 6487056
    Abstract: The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: November 26, 2002
    Assignee: Read-Rite Corporation
    Inventors: Matthew Gibbons, Kenneth E. Knapp, Ronald A. Barr, Benjamin P. Law, James Spallas, Ming Zhao
  • Patent number: 6433970
    Abstract: The present invention provides an improved current perpendicular to the plane thin film read head device and method of fabrication. With the present invention, the lower lead is formed to inhibit accumulation of redeposited lead material on CPP sensor element side walls during CPP sensor formation. In the preferred embodiment, the upper portion of the lower lead, which normally is etched during sensor element formation, is formed of a low sputter yield material to reduce redeposition flux to the sensor side walls. It is also preferred to form the upper portion of a material that also has a low value for the ratio of its sputter yield at the lead milling angle-to-its sputter yield at the side wall milling angle to inhibit redeposition accumulation on the side wall. It is preferred to clad conventional lead material with a low sputter yield ratio, low resistivity material, to inhibit side wall redeposition accumulation while also providing a low resistance lower lead.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: August 13, 2002
    Assignee: Read-Rite Corporation
    Inventors: Kenneth E. Knapp, Ronald A. Barr, Lien-Chang Wang, Benjamin P. Law, James Spallas
  • Patent number: 6421212
    Abstract: The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: July 16, 2002
    Assignee: Read-Rite Corporation
    Inventors: Matthew Gibbons, Kenneth E. Knapp, Ronald A. Barr, Benjamin P. Law, James Spallas, Ming Zhao