Abstract: A host bridge having a dataflow controller is provided. In a preferred embodiment, the host bridge contains a read command path which has a mechanism for requesting and receiving data from an upstream device. The host bridge also contains a write command path that has means for receiving data from a downstream device and for transmitting the received data to an upstream device. A target controller is used to receive the read and write commands from the downstream device and to steer the read command toward the read command path and the write command toward the write command path. A bus controller is also used to request control of an upstream bus before transmitting the request for data of the read command and transmitting the data of the write command.

Abstract: An apparatus and method of transmitting data from a PCI 2.1 compliant device is provided. PCI devices (i.e., PCI bridges) designed in accordance with the 2.1 PCI specification have a load data ordering feature that prohibits load data to bypass DMA write data in the bridge. The present apparatus and method allow load data to bypass DMA write data in the PCI bridge if the bridge is in an error state.

Abstract: A methodology and implementing system are provided in which PCI system configuration data is made available to a host X86 system CPU through an intermediate PowerPC system. A bus converter circuit connected between the X86 bus and the PowerPC bus is effective to translate configuration addresses between the X86 and the PowerPC system. A PCI host bridge arrangement includes a primary PCI host bridge circuit and a plurality of secondary peer PCI host bridge circuits. The primary host bridge circuit is effective to process configuration data requests from the bus converter circuit which are directed to any of the secondary PCI host bridge circuits.

Abstract: An apparatus and method of assigning communication channels for transmitting data through a host bridge are provided. In a preferred embodiment, a determination is made as to whether data is being transmitted through any one of the channels. If data is not being transmitted through one the channels, that channel is designated as the transmission channel for the present data transaction. If data is being transmitted through all of the channels, a least most recently used channel is selected as the data transmission channel. If however, more than one channel is not transmitting data, the data transmission channel assignments are made among the idle channels from a lowest channel number (e.g., channel 0) to a highest channel number (e.g., channel 7) or vice versa.

Abstract: A method and apparatus for snooping a host bridge. In a preferred embodiment, the apparatus includes a mechanism for loading data into the host bridge. Once the data is loaded, it is determined whether a copy of the data already resides in the host bridge. If so and the host bridge is not in the midst of a DMA transaction, the data will be immediately invalidated. If the host is in the midst of a DMA transaction, the data is then marked for invalidation.