Patents by Inventor James T. Chen

James T. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7253649
    Abstract: An upward facing probing mechanism using mercury probe contacts for accurate automatic multi-site measurements of a semiconductor wafer, especially of ultra-shallow ion implanted layers on a semiconductor wafer held top surface facing downward. A fixed force is applied to the wafer regardless of the thickness of the wafer through the of use of a regulated pressure piston. Incorporated are a plurality of spring-loaded rod assemblies to support the floating probe head to position the probe head face into full contact with the wafer surface accurately placing all mercury contacts on the surface of the wafer regardless of the inclination of the wafer as a result of the even support of the probe head by the spring-loaded rod assemblies. Included is a mechanism to refresh the mercury contacts for each probing with full containment and recovery of the mercury used in each probing.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: August 7, 2007
    Assignee: Four Dimensions, Inc,
    Inventor: James T. Chen
  • Patent number: 6810758
    Abstract: Provided is a test system and method that permits automatically interchanging a plurality of tools to seamlessly perform various functions on a sample. Each tool is mounted in an assembly and the sample is mounted on a chuck. A path is defined in a plane along which a carriage on which the tool assemblies are mounted is transported with the tools each positioned in the same attitude with respect to, and distance from, that path. The carriage is transported along the path to a position where one of the tools is adjacent the chuck which is rotated, if necessary, to position a desired point of interest on the sample immediately adjacent the tool. Once positioned, the tool engages the sample to perform a test. Following testing, the tool is disengaged from the sample and the process repeated as necessary for each additional test to be performed on the sample.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: November 2, 2004
    Assignee: Four Dimensions, Inc.
    Inventors: James T. Chen, Gong Wang
  • Publication number: 20030005783
    Abstract: Provided is a test system and method that permits automatically interchanging a plurality of tools to seamlessly perform various functions on a sample. Each tool is mounted in an assembly and the sample is mounted on a chuck. A path is defined in a plane along which a carriage on which the tool assemblies are mounted is transported with the tools each positioned in the same attitude with respect to, and distance from, that path. The carriage is transported along the path to a position where one of the tools is adjacent the chuck which is rotated, if necessary, to position a desired point of interest on the sample immediately adjacent the tool. Once positioned, the tool engages the sample to perform a test. Following testing, the tool is disengaged from the sample and the process repeated as necessary for each additional test to be performed on the sample.
    Type: Application
    Filed: July 16, 2002
    Publication date: January 9, 2003
    Inventors: James T. Chen, Gong Wang
  • Patent number: 6435045
    Abstract: Provided is a test system and method that permits automatically interchanging a plurality of tools to seamlessly perform various functions on a sample. Each tool is mounted in an assembly and the sample is mounted on a chuck. A path is defined in a plane along which the chuck is transported with the tools each positioned in the same attitude with respect to, and distance from, that path. The chuck is transported along the path to a position adjacent one of the tools and rotated, if necessary, to position a point of interest on the sample immediately adjacent the tool. Once positioned, the tool engages the sample to perform a test. Following testing, the tool is disengaged from the sample and the process repeated as necessary for each additional test to be performed on the sample.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: August 20, 2002
    Assignee: Four Dimensions, Inc.
    Inventors: James T. Chen, Gong Wang
  • Patent number: 6331724
    Abstract: A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding field insulating regions and has rounded edges to minimize leakage concerns. The tunnel dielectric separating the dual layer floating gate from the substrate comprises a layer of uniform thickness which is grown prior to the formation of the field insulating regions. The Fowler-Nordheim tunneling mechanism is used for programming and erasing the inventive cells in a programming process flow which comprises flash programming all cells on a word line, sensing current on a selected cell, and selectively erasing the charge on the cell by applying a higher voltage on the intersecting bit line than is applied to the word line, until the sensed current is as desired.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: December 18, 2001
    Assignee: Nippon Precision Circuits, Inc.
    Inventors: James T. Chen, Atsuo Yagi
  • Patent number: 5773861
    Abstract: A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding field insulating regions and has rounded edges to minimize leakage concerns. The tunnel dielectric separating the dual layer floating gate from the substrate comprises a layer of uniform thickness which is grown prior to the formation of the field insulating regions. The Fowler-Nordheim tunneling mechanism is used for programming and erasing the inventive cells in a programming process flow which comprises flash programming all cells on a word line, sensing current on a selected cell, and selectively erasing the charge on the cell by applying a higher voltage on the intersecting bit line than is applied to the word line, until the sensed current is as desired.
    Type: Grant
    Filed: November 17, 1995
    Date of Patent: June 30, 1998
    Assignee: Nippon Precision Circuits, Inc.
    Inventors: James T. Chen, Atsuo Yagi
  • Patent number: 5635416
    Abstract: A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding field insulating regions and has rounded edges to minimize leakage concerns. The tunnel dielectric separating the dual layer floating gate from the substrate comprises a layer of uniform thickness which is grown prior to the formation of the field insulating regions. The Fowler-Nordheim tunneling mechanism is used for programming and erasing the inventive cells in a programming process flow which comprises flash programming all cells on a word line, sensing current on a selected cell, and selectively erasing the charge on the cell by applying a higher voltage on the intersecting bit line than is applied to the word line, until the sensed current is as desired.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 3, 1997
    Assignee: Seiko Precision Inc.
    Inventors: James T. Chen, Atsuo Yagi