Patents by Inventor James T. DEAS

James T. DEAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230179217
    Abstract: Coulomb counter circuitry operable in a first mode of operation and a second mode of operation, the coulomb counter circuitry comprising: first analog to digital converter (ADC) circuitry configured to generate a first ADC output signal indicative of a current through a load coupled to the coulomb counter circuitry; second analog to digital converter (ADC) circuitry; offset correction circuitry; and accumulator circuitry configured to generate a signal indicative of a cumulative amount of charge transferred to the load, wherein in the second mode of operation, the coulomb counter circuitry is operable to enable the second ADC circuitry and to generate an offset correction factor based at least in part on a second ADC output signal output by the second ADC circuitry, and wherein in subsequent operation of the coulomb counter circuitry in the first mode of operation, the offset correction circuitry applies the offset correction factor to the first ADC output signal.
    Type: Application
    Filed: November 15, 2022
    Publication date: June 8, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Paul WILSON, James T. DEAS, Mucahit KOZAK, Graeme G. MACKAY
  • Publication number: 20220385252
    Abstract: A circuit may include a two-stage feedforward compensated operational transconductance integrated amplifier, and the two-stage feedforward compensated operational transconductance integrated amplifier may include an input terminal, an output terminal, a signal path between the input terminal and the output terminal, the signal path comprising a first signal path gain stage and a second signal path gain stage, and ripple rejection circuitry coupled between the input terminal and an intermediate node of the signal path located between the first signal path gain stage and the second signal path gain stage.
    Type: Application
    Filed: January 27, 2022
    Publication date: December 1, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Sven SOELL, Paul WILSON, James T. DEAS, Axel THOMSEN